13-Channel Power Management Integrated Circuit (PMIC) for Ultra Low Power Application
PF9453 Low Power Multi Rail PMIC for i.MX 91 and Simple Linux Platforms
- This page contains information on a preproduction product. Specifications and information herein are subject to change without notice. For additional information contact support or your sales representative.
The PF9453 is a single chip Power Management IC (PMIC) specifically designed for i.MX 91 processor. It provides power supply solutions for IoT (Internet of Things), smart appliance, and portable applications where size and efficiency are critical. The device provides four high efficiency step-down regulators, three LDOs, one 400 mA load switch and 32.768 kHz crystal oscillator driver.
One buck regulator supports Dynamic Voltage Scaling (DVS) along with programmable ramping up and down time. This device is characterized across -40 °C to 105 °C ambient temperature range, making it a good option for the industrial, extended industrial, and consumer markets. The four step-down regulators are designed to provide power for i.MX 91 processor and the associated DRAM memory.
One always-on LDO is for secure non-volatile storage (SNVS) core power supply, two LDOs are purposed to supply power to processor and peripheral devices. One 400 mA load switch supplies 3.3 V power to SD card, which has an internal discharge resistor, used to discharge the electric charge stored in the output when the equipment is turned off, for safety reasons. The PF9453 is offered in 40-pin HVQFN package, 5 mm x 5 mm, 0.4 mm pitch and a in 36-bump wafer-level CSP package, 2.48 mm x 2.48 mm, 0.4 mm pitch.
Product Details
Features
Four Buck Regulators
- BUCK1: 0.6 V to 3.775 V, 25 mV step, 2000 mA
- BUCK2: 0.6 V to 2.1875 V, 12.5 mV step, 2700 mA (QFN) / 2000 mA (WLCSP)
- BUCK3: 0.6 V to 3.775 V, 25 mV step, 2000 mA
- BUCK4: 0.6 V to 3.775 V, 25 mV step, 2500 mA
- Dynamic Voltage Scaling on BUCK2
- Monitor fault condition
Three Linear Regulators
- LDO_SNVS, always-on, 1.2 V to 3.4 V in QFN or 0.8 V to 3.0 V in WLCSP with 25 mV step, 10 mA
- LDO1, 0.8 V to 3.3 V with 25 mV step, 250 mA, voltage selection through SD_VSEL pin
- LDO2 (QFN only), 0.5 V to 1.95 V with 25 mV step, 200 mA
Power Control IO
- Power ON/OFF control
- Standby/Run mode control
- Watchdog reset input
ESD protection
- Human Body Model (HBM) : ± 2000 V
- Charged Device Model (CDM) : ± 500 V
System Features
- One 400 mA load switch with a built-in active discharge resistor and GPIO/I²C control, multiplexed with DBUS debounce filter
- 32.768 kHz crystal oscillator driver and buffer output
- Flexible power ON/OFF sequence, One Time Programmable (OTP) device configuration
- Built-in active discharge resistor
- Fm+ 1 MHz I²C Interface
