VR5500 | High Voltage PMIC with Multiple SMPS and LDO | NXP Semiconductors

High Voltage PMIC with Multiple SMPS

NXP Power Management Custom OTP Programming

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Block Diagram

VR5500, High Voltage PMIC Block Diagram

VR5500, High Voltage PMIC Block Diagram

Features

Key Features

  • 60 V maximum input voltage for automotive and truck markets
  • Multiple SMPS and LDO
  • Standby OFF mode with very low sleep current (10 µA)
  • Device control via I²C interface with CRC
  • Three voltage monitoring circuits, dedicated interface for MCU monitoring, power good, reset and interrupt outputs
  • QM, AEC-Q100 rev H qualified

Programmability

  • Supplies, sequencing, and specific functions can be programmed by One Time programmable (OTP) memory
  • Standard Predefined OTP supporting popular MCU can be found in data sheet under “ordering information” chapter
  • During development phase, Customized OTP part can be programmed using the KITVR55-FSSKTEVM board
  • Custom OTP can be provided for production. Please contact your NXP sales channel (NXP or your distributor)
  • Custom OTP form can be downloaded OTP Configuration Tool

Comparison Table

Scalable Power and Safety Concept

Buy/Parametrics

2 results

Include 0 NRND

Order

CAD Model

Status

Supply Voltage [min] (V)

Supply Voltage [max] (V)

Output Current (A)

Num. of Linear/LDO Regulators

Number of Buck Regulators

Number of LDO

Regulators-Buck Switching

Regulators-Boost Switching

Switching Frequency Vpre (kHz)

Switching Frequency LV Buck (MHz)

Number of Boost Regulators

Number of Channels

IQ (μA)

CAN PHY

LIN PHY

Safety Level

MCU Supported

Budgetary Price excluding tax

Device Function

Protection

Sample Exception Availability

Interface and Input Control

Additional Features - Security

Additional Features - Analog

AEC-Q100 Temperature Range

Ambient Operating Temperature (Min to Max) (℃)

Junction Temperature (Min to Max) (℃)

Package Type

Development Tools

Active

2.7

60

5

2, output 1.1V to 5V

4

2

1 HV buck output 3.3V to 5V, 1 LV buck output 1V to 3.3V, 2 LV bucks output 0.8V to 1.8V

1 LV boost output 5V to 5.74V

440

2

1

6

10

0

0

QM

S32R, S32V, TC2xxx, TC3xxx

1K @ US$4.41

CAN physical interfaces, LIN physical interfaces

current limit, overtemperature, overvoltage, undervoltage

Y

I2C, SPI

1 additional UV/OV inputs, Vcore UV/OV monitorings, Vddio UV/OV monitorings

AMUX, Frequency Tuning, Sync

grade 1

-40 to 125

-40 to 150

HVQFN56

KITVR5500AEEVM

Active

2.7

60

5

2, output 1.1V to 5V

4

2

1 HV buck output 3.3V to 5V, 1 LV buck output 1V to 3.3V, 2 LV bucks output 0.8V to 1.8V

1 LV boost output 5V to 5.74V

440

2

1

6

10

0

0

QM

S32R, S32V, TC2xxx, TC3xxx

1K @ US$4.41

CAN physical interfaces, LIN physical interfaces

current limit, overtemperature, overvoltage, undervoltage

Y

I2C, SPI

1 additional UV/OV inputs, Vcore UV/OV monitorings, Vddio UV/OV monitorings

Analog MUX, Diagnostics Reporting, External SMPS, Temp, VDDIO, Vboost, Vbos, Vbuckx, Vldos, Vpre, Vsup, Vwakex and internal supplies, Wake up capabilities

grade 1

-40 to 125

-40 to 150

HVQFN56

KITVR5500AEEVM

Documentation

Quick reference to our documentation types.

5 documents

Compact List

Application Note (1)
Brochure (1)
Data Sheet (2)
Supporting Information (1)

Design Files

Quick reference to our design files types.

1 design file

Hardware

Quick reference to our board types.

2 hardware offerings

Software

Quick reference to our software types.

1 software file

  • Code Snippets

    VR5500 OTP Configuration tool

    Account Required

Note: For better experience, software downloads are recommended on desktop.

Training

2 trainings

Support

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