The UJA113xA System Basis Chip (SBC) contains a fully integrated automatic SMPS Buck-Boost converter, a High-Speed CAN transceiver and up to two LIN transceivers along with a number of features commonly found in typical automotive Electronic Control Units (ECUs). It interfaces directly with CAN and LIN bus lines, supplies the microcontroller, handles input and output signals and supports fail-safe features including a watchdog and advanced 'limp home' functionality configurable via non-volatile memory.
The UJA113xA implements the High-Speed CAN physical layer as defined in the ISO 11898-2:2016 standard with additional timing parameters included, defining loop delay symmetry for CAN FD communication up to 5 Mbit/s. The UJA113xAHW/xFx variants support ISO 11898-2:2016 compliant CAN partial networking with a selective
wake-up function incorporating CAN FD-passive.