Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
PCF85053A is a CMOS real-time clock (RTC) and calendar, optimized for low power consumption and automatic switching to battery on primary power loss. Featuring clock output, alert interrupt output and 128-byte battery backed-up SRAM, the PCF85053A includes two I²C buses. The primary I²C bus has the read / write capability on RTC and SRAM registers; the second I²C bus also can read / write most registers with the control bits set by primary I²C controller.
PCF85053A offers clock output calibration-related registers such as crystal capacitive load (CL) configuration and offset register setting.
|
|
|
|
|
|
---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
2 documents
Please wait while your secure files are loading.
Receive the full breakdown. See the product footprint and more in the eCad file.
Receive the full breakdown. See the product footprint and more in the eCad file.