8-Bit I²C-Bus and SMBus Low-Power I/O Port with Interrupt and Reset | NXP Semiconductors

8-Bit I²C-Bus and SMBus Low-Power I/O Port with Interrupt and Reset

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Block Diagram

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PCA9538

PCA9538 Block Diagram

PCA9538BS, PCA9538D, PCA9538PW

Features

Key Features

  • 8-bit I²C-bus GPIO with interrupt and reset
  • Operating power supply voltage range of 2.3 V to 5.5 V (3.0 V to 5.5 V for PCA9538PW/Q900)
  • 5 V tolerant I/Os
  • Polarity Inversion register
  • Active LOW interrupt output
  • Active LOW reset input
  • Low standby current
  • Noise filter on SCL/SDA inputs
  • No glitch on power-up
  • Internal power-on reset
  • 8 I/O pins which default to 8 inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Offered in three different packages: SO16, TSSOP16 and HVQFN16

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Documentation

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1-10 of 15 documents

Compact List

Application Note (4)
Brochure (1)
Data Sheet (1)
Package Information (3)
Packing Information (3)
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Design Files

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4 design files

Hardware

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1 hardware offering

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