Low-Ohmic Four-Pole Double-Throw Analog Switch
Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
Layerscape 2084A and 2044A Multicore Processors
The LS2 family of processors delivers unprecedented performance and integration for tomorrow's smarter, more capable networks. The eight-core LS2084A and the four-core LS2044A multicore processors offer Arm® Cortex®- A72 cores with the advanced, high-performance datapath and network peripheral interfaces required for networking, telecom/datacom, wireless infrastructure, military, aerospace and automotive applications.
The next-generation datapath architecture, combined with a powerful software toolkit, provides a higher level of hardware abstraction and makes software development quick and simple.
This combination balances ease-of-use with high-performance processing in a Linux® environment that is familiar to any software programmer. Customers can fully exploit the underlying hardware and easily adapt to network changes for real-time 'soft' control over the network.
Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.
Product Details
Features
Core Complex
- Eight 64-bit Arm Cortex-A72 CPUs
- Up to 2 GHz,
- Clusters of two cores sharing 1 MB L2 cache
- 1 MB L3 platform cache
- Two 64-bit DDR4 SDRAM memory controllers
- ECC and interleaving support,
- Up to 2.1 GT/s
Networking Elements
- Wire Rate I/O processor, featuring:
- 8x 10 GbE
- 8x 1 GbE
- L2 switching on the Ethernet interface
- XAUI/XFI/KR and SGMII
- MACSec on up to four 1/10 GbE
- 2x SATA 3.0
- 4x PCIe Gen 3 controllers
- SR-IOV support, Root Complex
Accelerators and Memory Control
- 20 Gb/s SEC crypto acceleration
- 10 Gb/s Pattern Matching Engine
- 20 Gb/s Data Compression Engine
- 4 PCIe controllers (Gen3) supporting 1x8, 4x4, 4x2, 4x1 lane configurations
Basic Peripherals and Interconnect
- Support for hardware virtualization and partitioning enforcement
- Implements trust architecture combined with TrustZone®
- Service processor (SP) provides pre-boot initialization and secure-boot capabilities
- 2x USB 3.0 with PHY
- Enhanced secure digital host controller
- Serial peripheral interface (SPI) controller
- Quad Serial peripheral interface (QSPI) controller
- Four I²C controllers
- Two DUARTs
- Integrated flash controller (IFC 2.0) supporting NAND and NOR flash
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Buy/Parametrics
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Design Resources
Hardware
Quick reference to our
board types.
4 hardware offerings
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Evaluation and Development BoardsLayerscape LS2088A Reference Design BoardFeatured
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Emulators, Probes, and ProgrammersLS Processor Probe Tips for CodeWarrior TAP
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Additional hardware available. View our featured partner solutions.
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Emulators, Probes, and ProgrammersCodeWarrior® TAP
Software
Quick reference to our software types.
2 software files
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Development IDEs and Build Tools
CodeWarrior® Development Suites for Networked ApplicationsFeatured
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BSPs and Device Drivers
Linux® SDK for QorIQ® Processors
Note: For better experience, software downloads are recommended on desktop.
Engineering Services
To get further assistance directly from NXP, please see our Engineering Services.
1-5 of 22 engineering services
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Independent Design House (IDH)
Tailored Solutions
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Independent Design House (IDH)
Schematic Integrity AI Analysis
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Independent Design House (IDH)
Custom Layerscape AIOP microcoding
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Independent Design House (IDH)
Android and Linux Engineering Support
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To find additional partner offerings that support this product, visit our Partner Marketplace.