The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallel Input/Output (GPIO) expansion for I²C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I²C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. The system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system controller. Although pin-to-pin and I²C-bus address compatible with the PCF8575, software changes are required due to the enhancements, and are discussed in Application Note AN469.
The PCA9555 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system controller that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I²C-bus address and allow up to eight devices to share the same I²C-bus/SMBus. The fixed I²C-bus address of the PCA9555 is the same as the PCA9554, allowing up to eight of these devices in any combination to share the same I²C-bus/SMBus.
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Part | Order | CAD Model | No of bits | VDD [min] | VDD [max] | Over volt tolerant | No of supplies | Standby current [typ] (µA) | Max Sink Current per bit (mA) | Max Sink Current, per package (mA) | Source Current per bit (mA) | Interrupt output pin | Output mode | Input mode: invert option | Internal pull-up resistor per bit (kOhm) | I2C-bus (kHz) | Footprint body and leads | Package Type | Operating Temperature (°C) | No of Addresses |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
16 | 2.3 | 5.5 | Y | 1 | 0.25 | 25 | 200 | 10 | Y | Totem pole | Y | 100 | 400 | 16.81 | HVQFN24 | -40~85 | 8 | |||
16 | 2.3 | 5.5 | Y | 1 | 0.25 | 25 | 200 | 10 | Y | Totem pole | Y | 100 | 400 | 166.14 | SO24 | -40~85 | 8 | |||
16 | 2.3 | 5.5 | Y | 1 | 0.25 | 25 | 200 | 10 | Y | Totem pole | Y | 100 | 400 | 66.36 | SSOP24 | -40~85 | 8 | |||
16 | 2.3 | 5.5 | Y | 1 | 0.25 | 25 | 200 | 10 | Y | Totem pole | Y | 100 | 400 | 52.14 | TSSOP24 | -40~85 | 8 |
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