Layerscape® LS1012A Processor for the IoT

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The LS1012A processor, optimized for battery-backed or USB-powered, space-constrained networking and IoT applications, integrates a single Arm^® Cortex^®-A53 core running up to 1GHz with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance in an ultra-small size envelope at 1W typical power dissipation. The LS1012A incorporates the same Trust Architecture and software compatibility of higher-tier LS family devices, enabling scalable, secure applications that leverage a common 64-bit software platform.

Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.

Data Sheet

Reference Manual

Product Details

Block Diagram

LS1012A Block Diagram

Get diagram PDF

Features

Core Complex

Single 600 MHz or 1GHz Arm^{^®} Cortex^®-A53 core
32 KB-I and 32 KB-D ECC protected cache
256 KB L2 ECC protected cache
Over 4000 Coremarks performance

Networking Elements

Three-lane SerDes up to 6 GHz multiplexed across controllers supporting
- One PCI Express^{^®} Gen 2 interface
- One SATA 3.0 Interface
- Two 1Gb or 2.5Gb Ethernet Controllers

Accelerators and Memory Controllers

Packet Forwarding Engine
Integrated security engine (SEC)
16-bit DDR3L Memory Controller
QuadSPI Flash Memory Interface

Basic Peripherals and Interconnect

1x USB 3.0 + PHY
1x USB 2.0 + ULPI
1x SPI, 2x I2C
2x SD3.0 / SDIO / eMMC
2x UART
5x I2S

Additional Features

QorIQ^{^®} Trust Architecture
Arm TrustZone
9.6 x 9.6mm L-BGA package

Buy/Parametrics

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Documentation

Quick reference to our documentation types.

1-5 of 27 documents

^{Data Sheet}
LS1012A Data Sheet

PDFRev 2Jan 31, 20191.6 MBLS1012AEnglish
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^{Reference Manual}
LS1012A Reference Manual

PDFRev 3Oct 1, 202051.4 MBLS1012ARMEnglish
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^{Reference Manual}
LS1012A Security (SEC) Reference Manual

PDFRev 1Jul 27, 20175.4 MBLS1012ASECRMEnglish
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^{Application Note}
Thermal Management Unit Usage

PDFRev 0Apr 27, 2022241.6 KBAN12310English
^{Application Note}
DDR Interfacing for LS1012A Application Note

PDFRev 1Mar 9, 2021237.6 KBAN11950English
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^{Application Note}
PBL Configuration using QCVS Application Note

PDFRev 1Nov 30, 20201.0 MBAN5260English, 中文
^{Application Note}
AN5388 - Implementation of IEEE Standard 1149.6™ on LS1012A Processor, Application Note

PDFRev 0Sep 1, 2020291.8 KBAN5388English
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^{Application Note}
Boot Time Optimization of LS1043ARDB Using U-Boot Falcon Mode Application Note

PDFRev 0Nov 28, 2019176.2 KBAN12537English
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^{Application Note}
AN5192, LS1012A Design Checklist - Application Note

PDFRev 2May 9, 2019692.8 KBAN5192English
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^{Application Note}
Configure QSPI Bus Width and Frequency in Pre-Boot Loader Stage on LS Series Processors Application Note

PDFRev 0Nov 13, 2018236.9 KBAN12279English
^{Application Note}
Loading Boot Loader on LS1046ARDB through PCIe Application Note

PDFRev 0Nov 1, 20184.3 MBAN12246English
^{Application Note}
AN11980, LS1012A silicon changes from revision 1.0 to revision 2.0 - Application Note

PDFRev 0Jan 10, 2018240.7 KBAN11980English
^{Application Note}
AN5376, How Does QuadSPI Work with a Serial NAND - Application Note

PDFRev 0Sep 26, 2017359.4 KBAN5376English
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^{Application Note}
General soldering Temperature Process Guidelines

PDFRev 1Aug 16, 2017281.6 KBAN3300English
^{Application Note}
Implementing low cost supply for the LS1012A Application Note

PDFRev 0Apr 26, 2017142.6 KBAN11951English
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^{Application Note}
LS1012A, 211 FC-LGA Package and PCB Assembly Process Application Note

PDFRev Rev. 0Mar 2, 20173.5 MBAN5310English
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^{Application Note}
Enabling SDIO Wi-Fi on LS1012ARDB - Application Note

PDFRev 0Feb 15, 2017510.8 KBAN5414English
^{Application Note}
AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note

PDFRev 6Nov 25, 2013547.7 KBAN3940English
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^{Application Note}
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations

PDFRev Rev. 0May 13, 2011577.2 KBAN4311English
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^{Application Note}
DDR Interleaving for PowerQUICC and QorIQ Processors

PDFRev 1Jun 30, 2010717.3 KBAN3939English
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^{Application Note}
Solder Joint Temperature and Package Peak Temperature

PDFRev 0Aug 2, 2006151.6 KBAN3298English
^Errata
LS1012 Errata

The current errata for LS1012A is Feb 2023, Rev 6. It is an NDA document. Please see the Sharepoint site https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspxages/Home.aspx (NDA and NXP-issued invite required), or contact your NXP representative.

URLRev 5Feb 21, 2022LS1012-ERRATA-LINKEnglish
^{Fact Sheet}
LS1012A - Fact Sheet

PDFRev 0Feb 15, 2016289.8 KBLS1012AFSEnglish
^{Product Brief}
LS1012A Product Brief

PDFRev 2May 4, 2018250.3 KBLS1012APBEnglish
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^{Supporting Information}
Computing at the Edge – Executive Summary

PDFRev 1Dec 15, 201787.0 KBAWSGREENGRSSA4FLEnglish
^{Supporting Information}
FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper

PDFRev 1.9Oct 28, 2016303.5 KBFSLNISTCAVPEnglish
^{Supporting Information}
LS1012A_14A Family Customer Export Control Information

PDFRev 1Oct 12, 201617.6 KBLS1012A_14A-PECIEnglish

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Design Resources

Design Files

Receive the full breakdown. See the product footprint and more in the eCad file.

Hardware

Quick reference to our board types.

5 hardware offerings

^{Evaluation and Development Boards}
Layerscape FRWY-LS1012A BoardFeatured

FRWY-LS1012A
^{Evaluation and Development Boards}
Layerscape LS1012A Reference Design BoardFeatured

LS1012A-RDB
^{Complete Solution}
Layerscape LS1012A Smart Home Gateway Reference Design

SMART-HOME-GATEWAY
Additional hardware available. View our featured partner solutions.
^{Emulators, Probes, and Programmers}
LS Processor Probe Tips for CodeWarrior TAP

CWH-CTP-CTX10-YE
^{Emulators, Probes, and Programmers}
CodeWarrior^® TAP

CW_TAP

1-5 of 10 hardware offerings

^{Embedded Board Solutions}
efus™A53LS

Computer on Module based on NXP LS1012A with WLAN/BT (efusA53LS)

By F&S Elektronik Systeme GmbH Gold Partner
^{Embedded Board Solutions}
Single board computer OK1012A-C

CPU: NXP LS1012A Architecture: Cortex-A53 Frequency: 1.0GHz RAM: 512MB DDR3L ROM: 16MB QSPI NorFlash，8GB eMMC System: Ubuntu-18.04.1，OpenWrt v18.06.0-rc2

By Forlinx Embedded Technology Co., Ltd Gold Partner
^{Embedded Board Solutions}
MBLS1012AL

Single Board Computer (SBC) based on TQMLS1012AL as a high speed platform for smart IIOT solutions.

By TQ-Systems GmbH Platinum Partner
^{Embedded Board Solutions}
TQMLS1012AL

Small embedded Cortex A53 module based on LS1012A with high speed interfaces and very low power consumption.

By TQ-Systems GmbH Platinum Partner
^{Embedded Board Solutions}
uCLS1012A IoT SoM

LS1012A based SMARC SoM for secure IoT applications. It includes Mbarx Secure IoT software for connectivity, telemetry, management, OTA firmware updates over Ethernet or ...

By Arcturus Gold Partner
^{Embedded Board Solutions}
PDTA 1370

Desktop uCPE w/ NXP® Layerscape® LS1012A SoC Processors, 1+4 x GbE RJ45 Include One Combo Port and The PCIe Slot for Wi-Fi/LTE; with PFE (Packet Forwarding Engine) and SE...

By NEXCOM International Gold Partner
^{Embedded Board Solutions}
system on module FET1012A-C

CPU: LS1012A RAM: 512MB Flash: 8GB eMMC OS: Ubuntu, OpenWRT Certificate: CE, FCC, RoHS

By Forlinx Embedded Technology Co., Ltd Gold Partner
^{Embedded Board Solutions}
uCLS1012A VoIP SoM

LS1012A based SMARC SoM for hardened VoIP and IP audio/PA applications. Supports SIP/RTP with audio processing including intelligibility enhancements. SIPxtream + Mbarx s...

By Arcturus Gold Partner
^{Embedded Board Solutions}
Low cost 5G gateway embedded computer FCU2201

Model: FCU2201 CPU: LS1012A Architecture: Cortex-A53 Frequency: 1.0GHz RAM: 512MB DDR3 ROM: 8GB eMMC System: Ubuntu-18.04.1，OpenWrt v18.06.0-rc2

By Forlinx Embedded Technology Co., Ltd Gold Partner
^Module
TrustBox Edge 101

The Scalys TrustBox Edge 101 is an Industrial grade, tamper-resistant secured Azure IoT Edge device optimized for confidential computing using enclaves.

By Scalys BV Gold Partner