PowerQUICC® II Pro Processor with DDR2, PCI, 1 GB Ethernet, Dual USB, Security | NXP Semiconductors

PowerQUICC® II Pro Processor with DDR2, PCI, 1 GB Ethernet, Dual USB, Security

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Product Details

Features

  • 32-bit, high-performance superscalar core
  • 1260 MIPS @ 667 MHz
  • Double-precision floating point, integer, load/store, system register, and branch processor units
  • 32 KB data and 32 KB instruction cache with line locking support
  • DDR1/DDR2 memory controller, up to 333 MHz data rate, with 32- or 64-bit interfaces with ECC
  • One PCI interface
  • Dual 10/100/1000 Ethernet controllers
  • Embedded security engine
  • Dual Hi-Speed USB controllers
  • Local bus controller
  • Dual UART (DUART)
  • Dual I²C interfaces (controller or target mode)
  • Four-channel DMA controller
  • Serial peripheral interface (SPI)
  • General-purpose parallel I/O (GPIO)
  • IEEE 1149.1 JTAG test access port
  • Package: 672-pin, 35 mm x 35 mm TBGA (1 mm pitch)
  • Process technology: 130 nm CMOS
  • Voltage: 1.2V core voltage with 3.3V and 2.5V I/O
  • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch

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N true 0 PSPMPC8347Een 48 Application Note Application Note t789 22 Application Note Software Application Note Software t783 5 Data Sheet Data Sheet t520 1 Errata Errata t522 1 Fact Sheet Fact Sheet t523 2 Package Information Package Information t790 2 Product Brief Product Brief t532 1 Product Numbering Scheme Product Numbering Scheme t524 1 Reference Manual Reference Manual t877 5 Supporting Information Supporting Information t531 2 Training Presentation Training Presentation t878 2 White Paper White Paper t530 4 en_US 4 1 6 English Embedded systems that utilize double data rate memory (DDR) can realize increased performance over traditional single data rate (SDR) memories. As the name implies, DDR enables two data transactions to occur within a single clock cycle without having to double the applied clock or without having to double the size of the data bus. This increased data bus performance is achieved by the introduction of source-synchronous data strobes that permit data to be captured on both the falling and rising edges of the 1070392201176701407042 PSP 839.2 KB None None documents None 1070392201176701407042 /docs/en/application-note/AN2582.pdf 839193 /docs/en/application-note/AN2582.pdf AN2582 N 2003-12-02 Hardware and Layout Design Considerations for DDR Memory Interfaces /docs/en/application-note/AN2582.pdf /docs/en/application-note/AN2582.pdf Application Note N Y 645036621402383989 2022-12-07 pdf en Apr 3, 2007 Application Note t789 Application Note Application Note Y N Hardware and Layout Design Considerations for DDR Memory Interfaces 2 1 English This document assists the user in creating descriptors for requirements not covered in the SEC 2.0 reference device driver. 1107896125362744400814 PSP 765.5 KB None None documents None 1107896125362744400814 /docs/en/application-note/AN2755.pdf 765493 /docs/en/application-note/AN2755.pdf AN2755 N 2005-02-08 SEC 2.0 Descriptor Programmer's Guide /docs/en/application-note/AN2755.pdf /docs/en/application-note/AN2755.pdf Application Note N Y 645036621402383989 2022-12-07 pdf en Apr 7, 2010 Application Note t789 Application Note Application Note Y N SEC 2.0 Descriptor Programmer's Guide 3 1 English This application note discusses the architectural differences to consider when migrating from a PowerQUICC<sup>&#174;</sup> II to a PowerQUICC II Pro device. 1137095858557723377952 PSP 619.6 KB None None documents None 1137095858557723377952 /docs/en/application-note/AN2915.pdf 619610 /docs/en/application-note/AN2915.pdf AN2915 N 2006-01-12 Design Migration from the PowerQUICC<sup>&#174;</sup> II Family to the PowerQUICC II Pro Family /docs/en/application-note/AN2915.pdf /docs/en/application-note/AN2915.pdf Application Note N Y 645036621402383989 2022-12-07 pdf en Mar 16, 2006 Application Note t789 Application Note Application Note Y N Design Migration from the PowerQUICC<sup>&#174;</sup> II Family to the PowerQUICC II Pro Family 4 12 English This document applies only to MPC8347EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). 1142032005270714045794 PSP 738.4 KB None None documents None 1142032005270714045794 /docs/en/data-sheet/MPC8347EAEC.pdf 738381 /docs/en/data-sheet/MPC8347EAEC.pdf MPC8347EAEC N N 2006-03-10 MPC8347EA Data Sheet /docs/en/data-sheet/MPC8347EAEC.pdf /docs/en/data-sheet/MPC8347EAEC.pdf Data Sheet N Y 980000996212993340 2022-12-07 pdf N en Sep 21, 2011 Data Sheet t520 Data Sheet Data Sheet Y N MPC8347EA Data Sheet false en_US en Reference Manual Reference Manual 5 5 1.2 English This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). 1152739439331732884673 PSP 517.3 KB None None documents None 1152739439331732884673 /docs/en/reference-manual/MPC8349EARMAD.pdf 517305 /docs/en/reference-manual/MPC8349EARMAD.pdf MPC8349EARMAD documents N 2006-07-12 Errata to MPC8349EA Reference Manual, Revision 1 NOTE: This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). /docs/en/reference-manual/MPC8349EARMAD.pdf /docs/en/reference-manual/MPC8349EARMAD.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Mar 7, 2011 500633505221135046 Reference Manual Y N Errata to MPC8349EA Reference Manual, Revision 1 NOTE: This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). 6 4.1 English This addendum describes corrections to the e300 Power Architecture&#8482; Core Family Reference Manual, Revision 4. 1264006256879704515314 PSP 424.6 KB None None documents None 1264006256879704515314 /docs/en/reference-manual/e300CORERMAD.pdf 424614 /docs/en/reference-manual/e300CORERMAD.pdf E300CORERMAD documents N 2010-01-20 Errata to e300 Power Architecture&#8482; Core Family Reference Manual, Rev. 4 /docs/en/reference-manual/e300CORERMAD.pdf /docs/en/reference-manual/e300CORERMAD.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Jan 20, 2010 500633505221135046 Reference Manual Y N Errata to e300 Power Architecture&#8482; Core Family Reference Manual, Rev. 4 7 4 English Supports e300c1, e300c2, e300c3, e300c4. The primary objective of this reference manual is to describe the functionality of the microprocessors in the e300 core family, which are PowerPC &#8482; microprocessors built on Power Architecture &#8482; technology. The e300 designs are based on the MPC603e microprocessor. 1113346645199746873364 PSP 3.9 MB None None documents None 1113346645199746873364 /docs/en/reference-manual/e300coreRM.pdf 3862349 /docs/en/reference-manual/e300coreRM.pdf E300CORERM documents N 2005-04-12 e300 Power Architecture &#8482; Core Family - Reference Manual /docs/en/reference-manual/e300coreRM.pdf /docs/en/reference-manual/e300coreRM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Dec 12, 2007 500633505221135046 Reference Manual Y N e300 Power Architecture &#8482; Core Family - Reference Manual 8 1 English This reference manual defines the functionality of the MPC8349EA, MPC8347EA, and MPC8343EA. It is written from the perspective a user of the MPC8349EA, which is the superset device. 1140469818132695517073 PSP 9.0 MB None None documents None 1140469818132695517073 /docs/en/reference-manual/MPC8349EARM.pdf 8965351 /docs/en/reference-manual/MPC8349EARM.pdf MPC8349EARM documents N 2006-02-20 MPC8349EA Reference Manual /docs/en/reference-manual/MPC8349EARM.pdf /docs/en/reference-manual/MPC8349EARM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Aug 28, 2006 500633505221135046 Reference Manual Y N MPC8349EA Reference Manual 9 3 English Programming Environments Manual for 32-Bit Implementations of the Power Architecture. E966578690432 PSP 6.1 MB Registration without Disclaimer None documents Extended E966578690432 /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf 6125455 /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf MPCFPE32B documents Y N 2016-10-31 Programming Environments Manual for 32-Bit Implementations of the Power Architecture /webapp/Download?colCode=MPCFPE32B /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Oct 17, 2005 500633505221135046 Reference Manual Y N Programming Environments Manual for 32-Bit Implementations of the Power Architecture Application Note Application Note 19 10 0 Chinese Reviewing the troubleshoot microcontroller when there is a malfunction module. 1641302649210707506203zh PSP 303.0 KB None None documents None 1641302649210707506203 /docs/zh/application-note/AN13461.pdf 302971 /docs/zh/application-note/AN13461.pdf AN13461 documents N N 2022-01-04 AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/zh/application-note/AN13461.pdf /docs/zh/application-note/AN13461.pdf Application Note N 645036621402383989 2022-12-07 zh May 9, 2022 645036621402383989 Application Note Y N 恩智浦微控制器故障排除清单 0 English Reviewing the troubleshoot microcontroller when there is a malfunction module. 1641302649210707506203 PSP 303.0 KB None None documents None 1641302649210707506203 /docs/en/application-note/AN13461.pdf 302971 /docs/en/application-note/AN13461.pdf AN13461 documents N N 2022-01-04 AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/en/application-note/AN13461.pdf /docs/en/application-note/AN13461.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 30, 2021 645036621402383989 Application Note Y N AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note 11 3 English This document is a supplement to the SEC 2/3x reference device driver. 1224778148188710027580 PSP 1.1 MB Registration without Disclaimer None documents Extended 1224778148188710027580 /secured/assets/documents/en/application-note/AN3645.pdf 1147132 /secured/assets/documents/en/application-note/AN3645.pdf AN3645 documents Y N 2016-10-31 SEC 2/3x Descriptor Programmer’s Guide /webapp/Download?colCode=AN3645 /secured/assets/documents/en/application-note/AN3645.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Apr 28, 2017 645036621402383989 Application Note N SEC 2/3x Descriptor Programmer’s Guide 12 11 English AN2583: This application note provides programming guidelines for the PowerQUICC<sup>&#174;</sup> DDR-SDRAM memory controller and specifically JEDEC-compatible DDR1 SDRAM memories. 1070297961506735248621 PSP 333.2 KB None None documents None 1070297961506735248621 /docs/en/application-note/AN2583.pdf 333170 /docs/en/application-note/AN2583.pdf AN2583 documents N N 2003-12-01 AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note /docs/en/application-note/AN2583.pdf /docs/en/application-note/AN2583.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jul 29, 2014 645036621402383989 Application Note Y N AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note 13 0 English AN3830: This application note provides a practical guide to using Our CodeWarrior IDE to debug hardware. Focusing on PowerQUICC<sup>&#174;</sup> processors, this document covers many of the key features available in the IDE to assist in bring-up and troubleshooting of a new board. 1245429781973738421244 PSP 1.6 MB None None documents None 1245429781973738421244 /docs/en/application-note/AN3830.pdf 1576181 /docs/en/application-note/AN3830.pdf AN3830 documents N 2009-06-19 AN3830, Hardware Debugging Using the CodeWarrior<sup>&#174;</sup> &#8482; IDE - Application Notes /docs/en/application-note/AN3830.pdf /docs/en/application-note/AN3830.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 1, 2011 645036621402383989 Application Note Y N AN3830, Hardware Debugging Using the CodeWarrior<sup>&#174;</sup> &#8482; IDE - Application Notes 14 10 English This application note describes the generally recommended connections for new designs based on MPC8343E, MPC8347E, and MPC8349E. 1134505837941727107874 PSP 687.5 KB None None documents None 1134505837941727107874 /docs/en/application-note/AN2931.pdf 687507 /docs/en/application-note/AN2931.pdf AN2931 documents N 2005-12-13 PowerQUICC<sup>&#174;</sup> Design Checklist: for PowerQUICC II Pro (MPC834x) Devices /docs/en/application-note/AN2931.pdf /docs/en/application-note/AN2931.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 5, 2011 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup> Design Checklist: for PowerQUICC II Pro (MPC834x) Devices 15 1 English This application note describes how to use and benefit from DDR memory interleaving. 1251150824863717930878 PSP 717.3 KB Registration without Disclaimer None documents Extended 1251150824863717930878 /secured/assets/documents/en/application-note/AN3939.pdf 717276 /secured/assets/documents/en/application-note/AN3939.pdf AN3939 documents Y N 2016-10-31 DDR Interleaving for PowerQUICC and QorIQ Processors /webapp/Download?colCode=AN3939 /secured/assets/documents/en/application-note/AN3939.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 30, 2010 645036621402383989 Application Note Y N DDR Interleaving for PowerQUICC and QorIQ Processors 16 0 English AN4026SW.zip /secured/assets/documents/en/application-note-software/AN4026SW.zip /webapp/Download?colCode=AN4026SW&appType=license&docLang=en A common use of the QUICC Engine block is to establish an HDLC communication path over a TDM interface, such as a T1 or E1 link. This application note describes the various sub-blocks used in the QUICC Engine communications engine for this application, discusses how the sub-blocks interoperate with each other, describes how to initialize them for the HDLC communication path, and provides a software demonstration of HDLC mode via a TDM interface using on-chip loopback. 1260992898773711434436 PSP 718.0 KB None None documents None 1260992898773711434436 /docs/en/application-note/AN4026.pdf 718019 /docs/en/application-note/AN4026.pdf AN4026 documents N 2009-12-17 Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC /docs/en/application-note/AN4026.pdf /docs/en/application-note/AN4026.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 17, 2009 645036621402383989 Application Note N Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC 17 0 English High-level data link control (HDLC) is widely used in the telecommunications and networking industries. NXP&#8217;s PowerQUICC&#8482; communications processors have extensive support for HDLC protocol through the communications processor module (CPM) and QUICC Engine&#8482; technologies.&#13;&#10;&#13;&#10;This application note explains how NXP&#8217;s existing&#13;&#10;PowerQUICC communications processors use the CPM and QUICC Engine technologies to support the HDLC protocol and provides HDLC e 1258066893562722616236 PSP 496.6 KB None None documents None 1258066893562722616236 /docs/en/application-note/AN3966.pdf 496625 /docs/en/application-note/AN3966.pdf AN3966 documents N 2016-10-31 PowerQUICC™ HDLC Support and Example Code /docs/en/application-note/AN3966.pdf /docs/en/application-note/AN3966.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 10, 2009 645036621402383989 Application Note N PowerQUICC™ HDLC Support and Example Code 18 2 English AN2810SW.zip /secured/assets/documents/en/application-note-software/AN2810SW.zip /webapp/Download?colCode=AN2810SW&appType=license&docLang=en This application note describes how to effectively program and use the universal programmable machine (UPM) in the PowerQUICC<sup>&#174;</sup> line of communication processors through NXP&#8217;s UPM software tools. 1104253596524716967025 PSP 807.8 KB None None documents None 1104253596524716967025 /docs/en/application-note/AN2810.pdf 807775 /docs/en/application-note/AN2810.pdf AN2810 documents N 2005-01-03 PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration /docs/en/application-note/AN2810.pdf /docs/en/application-note/AN2810.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 20, 2009 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration 19 6 English This document outlines the differences between silicon revisions 1.x and 3.x with respect to software, hardware, internal module revision, and chip pin assignment. It also provides information for board designers migrating from revision 1.x to 3.x. This document is relevant for both software and hardware developers. 1133383649535732113886 PSP 494.6 KB None None documents None 1133383649535732113886 /docs/en/application-note/AN3055.pdf 494580 /docs/en/application-note/AN3055.pdf AN3055 documents N 2005-11-30 Migration from MPC834x Revision 1.x to Revision 3.x /docs/en/application-note/AN3055.pdf /docs/en/application-note/AN3055.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 22, 2009 645036621402383989 Application Note Y N Migration from MPC834x Revision 1.x to Revision 3.x 20 5 English This document explains how the frequency divider to calculate the SCL speed of the I2C interface is determined for the MPC824x, MPC83xx, MPC85xx, and MPC86xx devices. 1119553728324723212395 PSP 611.4 KB Registration without Disclaimer None documents Extended 1119553728324723212395 /secured/assets/documents/en/application-note/AN2919.pdf 611358 /secured/assets/documents/en/application-note/AN2919.pdf AN2919 documents Y N 2016-10-31 Determining the I2C Frequency Divider Ratio for SCL /webapp/Download?colCode=AN2919 /secured/assets/documents/en/application-note/AN2919.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Dec 31, 2008 645036621402383989 Application Note N Determining the I2C Frequency Divider Ratio for SCL 21 5.0 English This document expands on the description of the double data rate (DDR2) memory controller programmable registers described in the reference manuals for PowerQUICC processors. The corresponding material in the reference manual defines the function of each field in the programmable registers. This application note focuses when and why to select certain configurations of the bits and fields in the DDR2 registers to achieve efficient DDR programming. 1176147669904707686124 PSP 535.3 KB None None documents None 1176147669904707686124 /docs/en/application-note/AN3369.pdf 535277 /docs/en/application-note/AN3369.pdf AN3369 documents N 2007-04-09 PowerQUICC<sup>&#174;</sup> DDR2 SDRAM Controller Register Setting Considerations /docs/en/application-note/AN3369.pdf /docs/en/application-note/AN3369.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 11, 2008 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup> DDR2 SDRAM Controller Register Setting Considerations 22 0 English This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. 1198270786976715604383 PSP 547.7 KB None None documents None 1198270786976715604383 /docs/en/application-note/AN3544.pdf 547694 /docs/en/application-note/AN3544.pdf AN3544 documents N 2016-10-31 PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf /docs/en/application-note/AN3544.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 21, 2007 645036621402383989 Application Note N PowerQUICC™ Data Cache Coherency 23 0 English AN3538SW.zip /docs/en/application-note-software/AN3538SW.zip /docs/en/application-note-software/AN3538SW.zip This application note explains how to configure the memory controller to use ECC and how to use some of its test capabilities to validate correct ECC operation for the PowerQUICC<sup>&#174;</sup> II Pro family. 1197315617339724591437 PSP 460.6 KB None None documents None 1197315617339724591437 /docs/en/application-note/AN3538.pdf 460604 /docs/en/application-note/AN3538.pdf AN3538 documents N 2007-12-10 Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup> II /docs/en/application-note/AN3538.pdf /docs/en/application-note/AN3538.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 10, 2007 645036621402383989 Application Note Y N Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup> II 24 2 English These design guidelines are applicable for products that leverage the DDR2 SDRAM IP core, and are based on a compilation of internal platforms designed by NXP Semiconductors, Inc. These guidelines are constructed in such a fashion as to minimize board-related issues across multiple memory topologies while allowing maximum flexibility for the board designer. 1128961595061725581551 PSP 619.7 KB None None documents None 1128961595061725581551 /docs/en/application-note/AN2910.pdf 619650 /docs/en/application-note/AN2910.pdf AN2910 documents N 2016-10-31 Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces /docs/en/application-note/AN2910.pdf /docs/en/application-note/AN2910.pdf Application Note N 645036621402383989 2022-12-07 pdf en Mar 27, 2007 645036621402383989 Application Note N Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces 25 1 English The architecture for the PowerPC&#8482; instruction set provides two types of synchronizing instructions:&#13;&#10;* Context-synchronizing&#13;&#10;* Execution-synchronizing &#13;&#10;This application note presents a high-level definition and description of each type of synchronizing instruction. 1057245101474727053067 PSP 451.7 KB None None documents None 1057245101474727053067 /docs/en/application-note/AN2540.pdf 451663 /docs/en/application-note/AN2540.pdf AN2540 documents N 2003-07-03 Synchronizing Instructions for PowerPC(TM) Instruction Set Architecture /docs/en/application-note/AN2540.pdf /docs/en/application-note/AN2540.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 8, 2006 645036621402383989 Application Note Y N Synchronizing Instructions for PowerPC(TM) Instruction Set Architecture 26 1 English Instruction and Data Cache Locking on the G2 Processor Core M989436282236 PSP 485.4 KB None None documents None M989436282236 /docs/en/application-note/AN2129.pdf 485397 /docs/en/application-note/AN2129.pdf AN2129 documents N 2001-05-09 Instruction and Data Cache Locking on the e300 Processor Core /docs/en/application-note/AN2129.pdf /docs/en/application-note/AN2129.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jul 7, 2006 645036621402383989 Application Note Y N Instruction and Data Cache Locking on the e300 Processor Core 27 0 English Application note 1091114676455721383781 PSP 112.0 KB None None documents None 1091114676455721383781 /docs/en/application-note/AN2745.pdf 112007 /docs/en/application-note/AN2745.pdf AN2745 documents N 2004-07-29 Setting Up TSEC Hash Tables /docs/en/application-note/AN2745.pdf /docs/en/application-note/AN2745.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jul 29, 2004 645036621402383989 Application Note Y N Setting Up TSEC Hash Tables 28 0 English Simplified Mnemonics for PowerPC Instructions. 1064950886097724682016 PSP 1.4 MB None None documents None 1064950886097724682016 /docs/en/application-note/AN2491.pdf 1379878 /docs/en/application-note/AN2491.pdf AN2491 documents N 2003-09-30 Simplified Mnemonics for PowerPC Instructions /docs/en/application-note/AN2491.pdf /docs/en/application-note/AN2491.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 30, 2003 645036621402383989 Application Note Y N Simplified Mnemonics for PowerPC Instructions Application Note Software Application Note Software 5 29 0 English 1258066894053701788655 PSP 330.9 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended 1258066894053701788655 /secured/assets/documents/en/application-note-software/AN3966SW.zip 330857 /secured/assets/documents/en/application-note-software/AN3966SW.zip AN3966SW documents Y N 2016-10-31 Software to accompany application note AN3966 /webapp/Download?colCode=AN3966SW&appType=license /secured/assets/documents/en/application-note-software/AN3966SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Nov 10, 2009 789425793691620447 Application Note Software N Software to accompany application note AN3966 30 0 English 1197316910103728130595 PSP 193.9 KB None None documents None 1197316910103728130595 /docs/en/application-note-software/AN3538SW.zip 193903 /docs/en/application-note-software/AN3538SW.zip AN3538SW documents N 2007-12-10 Software Package for Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup>&#8482; II Pro /docs/en/application-note-software/AN3538SW.zip /docs/en/application-note-software/AN3538SW.zip Application Note Software N 789425793691620447 2022-12-07 zip en Dec 10, 2007 789425793691620447 Application Note Software D N Software Package for Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup>&#8482; II Pro 31 0 English This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. 1181767584945705509512 PSP 163.7 KB None None documents None 1181767584945705509512 /docs/en/application-note-software/AN3372.pdf 163681 /docs/en/application-note-software/AN3372.pdf AN3372 documents N 2016-10-31 Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf /docs/en/application-note-software/AN3372.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en Jun 13, 2007 789425793691620447 Application Note Software N Challenges in Testing for Power Rail Shorts with New Technologies 32 0 English This application note describes the steps required to initialize an MPC83xx device operating as a PCI agent. It compares initialization from the PCI host with initialization from the on-board e300 processor. It starts with an overview of the initialization process and then discusses key architectural considerations, hardware reset considerations, minimum initialization required to run software, and system implications. The procedure in this application note was performed with the MPC834x family, but it appl 1175891986109734102869 PSP 460.2 KB None None documents None 1175891986109734102869 /docs/en/application-note-software/AN3373.pdf 460203 /docs/en/application-note-software/AN3373.pdf AN3373 documents N 2007-04-06 PowerQUICC<sup>&#174;</sup> II Pro (MPC83xx) PCI Agent Initialization /docs/en/application-note-software/AN3373.pdf /docs/en/application-note-software/AN3373.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en Apr 6, 2007 789425793691620447 Application Note Software D N PowerQUICC<sup>&#174;</sup> II Pro (MPC83xx) PCI Agent Initialization 33 2 English AN2810, PowerQUICC<sup>&#174;</sup> UPM Configuration, PowerQUICC, Universal Programmable Machine, Configuration, Application Note 1113503860374718430905 PSP 5.6 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended 1113503860374718430905 /secured/assets/documents/en/application-note-software/AN2810SW.zip 5555 /secured/assets/documents/en/application-note-software/AN2810SW.zip AN2810SW documents Y N 2005-04-14 AN2810 Supporting Files /webapp/Download?colCode=AN2810SW&appType=license /secured/assets/documents/en/application-note-software/AN2810SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Aug 15, 2006 789425793691620447 Application Note Software N AN2810 Supporting Files Errata Errata 1 34 19 English This document describes all known silicon errata for the MPC8349E PowerQUICC<sup>&#174;</sup> II Pro family of integrated host processors. 1115153191110688318838 PSP 741.5 KB None None documents None 1115153191110688318838 /docs/en/errata/MPC8349ECE.pdf 741505 /docs/en/errata/MPC8349ECE.pdf MPC8349ECE documents N N 2005-05-03 MPC8349E PowerQUICC<sup>&#174;</sup> II Pro Family Device Errata /docs/en/errata/MPC8349ECE.pdf /docs/en/errata/MPC8349ECE.pdf Errata N 155452329886410597 2022-12-07 pdf N en Aug 31, 2011 155452329886410597 Errata Y N MPC8349E PowerQUICC<sup>&#174;</sup> II Pro Family Device Errata Fact Sheet Fact Sheet 2 35 7 English MPC8349E PowerQUICC<sup>&#174;</sup> II Pro 1082741064402718537545 PSP 357.5 KB None None documents None 1082741064402718537545 /docs/en/fact-sheet/MPC8349FS.pdf 357530 /docs/en/fact-sheet/MPC8349FS.pdf MPC8349FS documents N N 2020-02-12 MPC8349E Fact Sheet /docs/en/fact-sheet/MPC8349FS.pdf /docs/en/fact-sheet/MPC8349FS.pdf Fact Sheet N 736675474163315314 2022-12-07 pdf N en Feb 12, 2020 736675474163315314 Fact Sheet Y N MPC8349E Fact Sheet 36 0 English CommExpert (CE) is a powerful GUI-based tool that speeds and simplifies initialization, configuration and run time of the drivers and communications protocols managed by the QUICC Engine<sup>&#174;</sup>&#8482; based devices and other Power QUICC&#174; II Pro family devices. 1226441429617720571652 PSP 4.1 MB None None documents None 1226441429617720571652 /docs/en/fact-sheet/COMMEXPERTUSFS.pdf 4088718 /docs/en/fact-sheet/COMMEXPERTUSFS.pdf COMMEXPERTUSFS documents N N 2016-10-31 Freescale’s CommExpert Software /docs/en/fact-sheet/COMMEXPERTUSFS.pdf /docs/en/fact-sheet/COMMEXPERTUSFS.pdf Fact Sheet N 736675474163315314 2022-12-07 pdf N en Oct 15, 2008 736675474163315314 Fact Sheet Y N Freescale’s CommExpert Software Package Information Package Information 2 37 3 English Customer presentation on PBGA packages Q1019076364374 PSP 2.8 MB None None documents None Q1019076364374 /docs/en/package-information/PBGAPRES.pdf 2767864 /docs/en/package-information/PBGAPRES.pdf PBGAPRES documents N 2002-04-17 PBGA Packaging Customer Tutorial /docs/en/package-information/PBGAPRES.pdf /docs/en/package-information/PBGAPRES.pdf Package Information N 302435339416912908 2022-12-07 pdf en Mar 14, 2008 302435339416912908 Package Information Y N PBGA Packaging Customer Tutorial 38 1 English Presentation on understanding the TBGA packaging 1060112435258703527038 PSP 9.2 MB None None documents None 1060112435258703527038 /docs/en/package-information/TBGAPRESPKG.pdf 9224392 /docs/en/package-information/TBGAPRESPKG.pdf TBGAPRESPKG documents N 2003-08-05 TBGA Packaging Customer Tutorial /docs/en/package-information/TBGAPRESPKG.pdf /docs/en/package-information/TBGAPRESPKG.pdf Package Information N 302435339416912908 2022-12-07 pdf en Dec 13, 2006 302435339416912908 Package Information Y N TBGA Packaging Customer Tutorial Product Brief Product Brief 1 39 1 English Product Brief 1083006931217706444736 PSP 379.5 KB None None documents None 1083006931217706444736 /docs/en/product-brief/MPC8349EPB.pdf 379489 /docs/en/product-brief/MPC8349EPB.pdf MPC8349EPB documents N 2004-04-26 MPC8349E Product Brief /docs/en/product-brief/MPC8349EPB.pdf /docs/en/product-brief/MPC8349EPB.pdf Product Brief N 899114358132306053 2022-12-07 pdf en Apr 26, 2004 899114358132306053 Product Brief Y N MPC8349E Product Brief Product Numbering Scheme Product Numbering Scheme 1 40 1.3 English MPC834XE Family Part Number Scheme 1112027413689727091183 PSP 20.1 KB None None documents None 1112027413689727091183 /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf 20129 /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf MPC834XEFAMPNS documents N 2005-03-28 MPC834XE Family Part Number Scheme /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf Product Numbering Scheme N 554336734861737620 2022-12-07 pdf en Jun 6, 2007 554336734861737620 Product Numbering Scheme Y N MPC834XE Family Part Number Scheme Training Presentation Training Presentation 2 41 1.0 English 1109956254586711181212 PSP 331.7 KB None None documents None 1109956254586711181212 /docs/en/supporting-information/BRQUICCENGEXBF.pdf 331695 /docs/en/supporting-information/BRQUICCENGEXBF.pdf BRQUICCENGEXBF documents N N 2016-10-31 The QUICC Engine: Freescale's Next-Generation Communications Processor Module (CPM) /docs/en/supporting-information/BRQUICCENGEXBF.pdf /docs/en/supporting-information/BRQUICCENGEXBF.pdf Training Presentation N 501713016990820713 2023-06-19 pdf N en Feb 25, 2005 501713016990820713 Training Presentation Y N The QUICC Engine: Freescale's Next-Generation Communications Processor Module (CPM) 42 1 English Background information on security objectives of PowerQUICC<sup>&#174;</sup> secure communications processors. 1066686779430728245692 PSP 466.5 KB None None documents None 1066686779430728245692 /docs/en/supporting-information/PQSECBKGRNDRPT.pdf 466481 /docs/en/supporting-information/PQSECBKGRNDRPT.pdf PQSECBKGRNDRPT documents N 2003-10-20 Backgrounder: The Security Objectives of PowerQUICC<sup>&#174;</sup> Secure Communications Processors /docs/en/supporting-information/PQSECBKGRNDRPT.pdf /docs/en/supporting-information/PQSECBKGRNDRPT.pdf Training Presentation N 501713016990820713 2022-12-07 pdf en Apr 26, 2004 501713016990820713 Training Presentation Y N Backgrounder: The Security Objectives of PowerQUICC<sup>&#174;</sup> Secure Communications Processors Supporting Information Supporting Information 2 43 1.9 English FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. 1368836090577704535160 PSP 303.5 KB None None documents None 1368836090577704535160 /docs/en/supporting-information/FSLNISTCAVP.pdf 303546 /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP documents N N 2016-11-09 FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf /docs/en/supporting-information/FSLNISTCAVP.pdf Supporting Information N 371282830530968666 2022-12-07 pdf N en Oct 28, 2016 371282830530968666 Supporting Information Y N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 44 2 English Customer Export Control Information Document 1232680179361697397466 PSP 230.8 KB None None documents None 1232680179361697397466 /docs/en/supporting-information/MPC834XEPECI.pdf 230796 /docs/en/supporting-information/MPC834XEPECI.pdf MPC834XEPECI documents N N 2016-10-31 MPC834x Customer Export Control Information /docs/en/supporting-information/MPC834XEPECI.pdf /docs/en/supporting-information/MPC834XEPECI.pdf Supporting Information N 371282830530968666 2023-06-19 pdf N en Dec 10, 2010 371282830530968666 Supporting Information Y N MPC834x Customer Export Control Information White Paper White Paper 4 45 3 English Network security protocols and applications use a variety of cryptographic algorithms to achieve these high-level goals. Because cryptography is computationally intensive, hardware acceleration is highly desirable when cryptographic algorithms are frequent system functions. 1227561595497709456436 PSP 580.1 KB Registration without Disclaimer None documents Extended 1227561595497709456436 /secured/assets/documents/en/white-paper/CRYPTOWP.pdf 580121 /secured/assets/documents/en/white-paper/CRYPTOWP.pdf CRYPTOWP documents Y N 2016-10-31 Understanding Cryptographic Performance /webapp/Download?colCode=CRYPTOWP /secured/assets/documents/en/white-paper/CRYPTOWP.pdf White Paper N 918633085541740938 2022-12-07 pdf Y en Aug 15, 2008 918633085541740938 White Paper Y N Understanding Cryptographic Performance 46 0 English The focus of this white paper is to provide the end user with high level design considerations and/or trade-offs associated with migrating from SDRAM to DDR SDRAM-based designs. 1208376896761708228520 PSP 735.3 KB None None documents None 1208376896761708228520 /docs/en/white-paper/DDRSDRAMWP.pdf 735286 /docs/en/white-paper/DDRSDRAMWP.pdf DDRSDRAMWP documents N N 2016-10-31 Comparison of DDRx and SDRAM /docs/en/white-paper/DDRSDRAMWP.pdf /docs/en/white-paper/DDRSDRAMWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Apr 16, 2008 918633085541740938 White Paper Y N Comparison of DDRx and SDRAM 47 1 English White Paper 1109024327078700240135 PSP 246.1 KB None None documents None 1109024327078700240135 /docs/en/white-paper/NANDFLASHWP.pdf 246130 /docs/en/white-paper/NANDFLASHWP.pdf NANDFLASHWP documents N N 2016-10-31 How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash /docs/en/white-paper/NANDFLASHWP.pdf /docs/en/white-paper/NANDFLASHWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Oct 24, 2005 918633085541740938 White Paper Y N How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash 48 0 English White Paper 1108068301263725831691 PSP 74.0 KB None None documents None 1108068301263725831691 /docs/en/white-paper/PublicKeyPerfWP.pdf 73984 /docs/en/white-paper/PublicKeyPerfWP.pdf PUBLICKEYPERFWP documents N N 2016-10-31 Understanding Public-Key Performance /docs/en/white-paper/PublicKeyPerfWP.pdf /docs/en/white-paper/PublicKeyPerfWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Feb 10, 2005 918633085541740938 White Paper Y N Understanding Public-Key Performance false 0 MPC8347E downloads en true 1 Y PSP Application Note 22 /docs/en/application-note/AN13461.pdf 2022-01-04 1641302649210707506203 PSP 10 Nov 30, 2021 Application Note Reviewing the troubleshoot microcontroller when there is a malfunction module. None /docs/en/application-note/AN13461.pdf English documents 302971 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN13461.pdf AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/en/application-note/AN13461.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note 303.0 KB AN13461 N 1641302649210707506203 /secured/assets/documents/en/application-note/AN3645.pdf 2016-10-31 1224778148188710027580 PSP 11 Apr 28, 2017 Application Note This document is a supplement to the SEC 2/3x reference device driver. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3645.pdf English documents 1147132 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN3645 SEC 2/3x Descriptor Programmer’s Guide /secured/assets/documents/en/application-note/AN3645.pdf documents 645036621402383989 Application Note N en Extended pdf 3 Y N SEC 2/3x Descriptor Programmer’s Guide 1.1 MB AN3645 N 1224778148188710027580 /docs/en/application-note/AN2583.pdf 2003-12-01 1070297961506735248621 PSP 12 Jul 29, 2014 Application Note AN2583: This application note provides programming guidelines for the PowerQUICC<sup>&#174;</sup> DDR-SDRAM memory controller and specifically JEDEC-compatible DDR1 SDRAM memories. None /docs/en/application-note/AN2583.pdf English documents 333170 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2583.pdf AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note /docs/en/application-note/AN2583.pdf documents 645036621402383989 Application Note N en None Y pdf 11 N N AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note 333.2 KB AN2583 N 1070297961506735248621 /docs/en/application-note/AN3830.pdf 2009-06-19 1245429781973738421244 PSP 13 Feb 1, 2011 Application Note AN3830: This application note provides a practical guide to using Our CodeWarrior IDE to debug hardware. Focusing on PowerQUICC<sup>&#174;</sup> processors, this document covers many of the key features available in the IDE to assist in bring-up and troubleshooting of a new board. None /docs/en/application-note/AN3830.pdf English documents 1576181 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3830.pdf AN3830, Hardware Debugging Using the CodeWarrior<sup>&#174;</sup> &#8482; IDE - Application Notes /docs/en/application-note/AN3830.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N AN3830, Hardware Debugging Using the CodeWarrior<sup>&#174;</sup> &#8482; IDE - Application Notes 1.6 MB AN3830 N 1245429781973738421244 /docs/en/application-note/AN2931.pdf 2005-12-13 1134505837941727107874 PSP 14 Jan 5, 2011 Application Note This application note describes the generally recommended connections for new designs based on MPC8343E, MPC8347E, and MPC8349E. None /docs/en/application-note/AN2931.pdf English documents 687507 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2931.pdf PowerQUICC<sup>&#174;</sup> Design Checklist: for PowerQUICC II Pro (MPC834x) Devices /docs/en/application-note/AN2931.pdf documents 645036621402383989 Application Note N en None Y pdf 10 N PowerQUICC<sup>&#174;</sup> Design Checklist: for PowerQUICC II Pro (MPC834x) Devices 687.5 KB AN2931 N 1134505837941727107874 /secured/assets/documents/en/application-note/AN3939.pdf 2016-10-31 1251150824863717930878 PSP 15 Jun 30, 2010 Application Note This application note describes how to use and benefit from DDR memory interleaving. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3939.pdf English documents 717276 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3939 DDR Interleaving for PowerQUICC and QorIQ Processors /secured/assets/documents/en/application-note/AN3939.pdf documents 645036621402383989 Application Note N en Extended Y pdf 1 Y N DDR Interleaving for PowerQUICC and QorIQ Processors 717.3 KB AN3939 N 1251150824863717930878 /docs/en/application-note/AN4026.pdf 2009-12-17 1260992898773711434436 PSP 16 Dec 17, 2009 Application Note A common use of the QUICC Engine block is to establish an HDLC communication path over a TDM interface, such as a T1 or E1 link. This application note describes the various sub-blocks used in the QUICC Engine communications engine for this application, discusses how the sub-blocks interoperate with each other, describes how to initialize them for the HDLC communication path, and provides a software demonstration of HDLC mode via a TDM interface using on-chip loopback. None /docs/en/application-note/AN4026.pdf English documents 718019 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4026.pdf Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC /docs/en/application-note/AN4026.pdf documents 645036621402383989 Application Note N en None pdf 0 N Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC 718.0 KB AN4026 N 1260992898773711434436 /docs/en/application-note/AN3966.pdf 2016-10-31 1258066893562722616236 PSP 17 Nov 10, 2009 Application Note High-level data link control (HDLC) is widely used in the telecommunications and networking industries. NXP&#8217;s PowerQUICC&#8482; communications processors have extensive support for HDLC protocol through the communications processor module (CPM) and QUICC Engine&#8482; technologies.&#13;&#10;&#13;&#10;This application note explains how NXP&#8217;s existing&#13;&#10;PowerQUICC communications processors use the CPM and QUICC Engine technologies to support the HDLC protocol and provides HDLC e None /docs/en/application-note/AN3966.pdf English documents 496625 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3966.pdf PowerQUICC™ HDLC Support and Example Code /docs/en/application-note/AN3966.pdf documents 645036621402383989 Application Note N en None pdf 0 N PowerQUICC™ HDLC Support and Example Code 496.6 KB AN3966 N 1258066893562722616236 /docs/en/application-note/AN2810.pdf 2005-01-03 1104253596524716967025 PSP 18 Oct 20, 2009 Application Note This application note describes how to effectively program and use the universal programmable machine (UPM) in the PowerQUICC<sup>&#174;</sup> line of communication processors through NXP&#8217;s UPM software tools. None /docs/en/application-note/AN2810.pdf English documents 807775 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2810.pdf PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration /docs/en/application-note/AN2810.pdf documents 645036621402383989 Application Note N en None Y pdf 2 N PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration 807.8 KB AN2810 N 1104253596524716967025 /docs/en/application-note/AN3055.pdf 2005-11-30 1133383649535732113886 PSP 19 Jan 22, 2009 Application Note This document outlines the differences between silicon revisions 1.x and 3.x with respect to software, hardware, internal module revision, and chip pin assignment. It also provides information for board designers migrating from revision 1.x to 3.x. This document is relevant for both software and hardware developers. None /docs/en/application-note/AN3055.pdf English documents 494580 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3055.pdf Migration from MPC834x Revision 1.x to Revision 3.x /docs/en/application-note/AN3055.pdf documents 645036621402383989 Application Note N en None Y pdf 6 N Migration from MPC834x Revision 1.x to Revision 3.x 494.6 KB AN3055 N 1133383649535732113886 /secured/assets/documents/en/application-note/AN2919.pdf 2016-10-31 1119553728324723212395 PSP 20 Dec 31, 2008 Application Note This document explains how the frequency divider to calculate the SCL speed of the I2C interface is determined for the MPC824x, MPC83xx, MPC85xx, and MPC86xx devices. Registration without Disclaimer /secured/assets/documents/en/application-note/AN2919.pdf English documents 611358 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN2919 Determining the I2C Frequency Divider Ratio for SCL /secured/assets/documents/en/application-note/AN2919.pdf documents 645036621402383989 Application Note N en Extended pdf 5 Y N Determining the I2C Frequency Divider Ratio for SCL 611.4 KB AN2919 N 1119553728324723212395 /docs/en/application-note/AN3369.pdf 2007-04-09 1176147669904707686124 PSP 21 Sep 11, 2008 Application Note This document expands on the description of the double data rate (DDR2) memory controller programmable registers described in the reference manuals for PowerQUICC processors. The corresponding material in the reference manual defines the function of each field in the programmable registers. This application note focuses when and why to select certain configurations of the bits and fields in the DDR2 registers to achieve efficient DDR programming. None /docs/en/application-note/AN3369.pdf English documents 535277 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3369.pdf PowerQUICC<sup>&#174;</sup> DDR2 SDRAM Controller Register Setting Considerations /docs/en/application-note/AN3369.pdf documents 645036621402383989 Application Note N en None Y pdf 5.0 N PowerQUICC<sup>&#174;</sup> DDR2 SDRAM Controller Register Setting Considerations 535.3 KB AN3369 N 1176147669904707686124 /docs/en/application-note/AN3544.pdf 2016-10-31 1198270786976715604383 PSP 22 Dec 21, 2007 Application Note This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. None /docs/en/application-note/AN3544.pdf English documents 547694 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3544.pdf PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf documents 645036621402383989 Application Note N en None pdf 0 N PowerQUICC™ Data Cache Coherency 547.7 KB AN3544 N 1198270786976715604383 /docs/en/application-note/AN3538.pdf 2007-12-10 1197315617339724591437 PSP 23 Dec 10, 2007 Application Note This application note explains how to configure the memory controller to use ECC and how to use some of its test capabilities to validate correct ECC operation for the PowerQUICC<sup>&#174;</sup> II Pro family. None /docs/en/application-note/AN3538.pdf English documents 460604 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3538.pdf Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup> II /docs/en/application-note/AN3538.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup> II 460.6 KB AN3538 N 1197315617339724591437 /docs/en/application-note/AN2910.pdf 2016-10-31 1128961595061725581551 PSP 24 Mar 27, 2007 Application Note These design guidelines are applicable for products that leverage the DDR2 SDRAM IP core, and are based on a compilation of internal platforms designed by NXP Semiconductors, Inc. These guidelines are constructed in such a fashion as to minimize board-related issues across multiple memory topologies while allowing maximum flexibility for the board designer. None /docs/en/application-note/AN2910.pdf English documents 619650 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2910.pdf Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces /docs/en/application-note/AN2910.pdf documents 645036621402383989 Application Note N en None pdf 2 N Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces 619.7 KB AN2910 N 1128961595061725581551 /docs/en/application-note/AN2540.pdf 2003-07-03 1057245101474727053067 PSP 25 Nov 8, 2006 Application Note The architecture for the PowerPC&#8482; instruction set provides two types of synchronizing instructions:&#13;&#10;* Context-synchronizing&#13;&#10;* Execution-synchronizing &#13;&#10;This application note presents a high-level definition and description of each type of synchronizing instruction. None /docs/en/application-note/AN2540.pdf English documents 451663 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2540.pdf Synchronizing Instructions for PowerPC(TM) Instruction Set Architecture /docs/en/application-note/AN2540.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Synchronizing Instructions for PowerPC(TM) Instruction Set Architecture 451.7 KB AN2540 N 1057245101474727053067 /docs/en/application-note/AN2129.pdf 2001-05-09 M989436282236 PSP 26 Jul 7, 2006 Application Note Instruction and Data Cache Locking on the G2 Processor Core None /docs/en/application-note/AN2129.pdf English documents 485397 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2129.pdf Instruction and Data Cache Locking on the e300 Processor Core /docs/en/application-note/AN2129.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Instruction and Data Cache Locking on the e300 Processor Core 485.4 KB AN2129 N M989436282236 /docs/en/application-note/AN2745.pdf 2004-07-29 1091114676455721383781 PSP 27 Jul 29, 2004 Application Note Application note None /docs/en/application-note/AN2745.pdf English documents 112007 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2745.pdf Setting Up TSEC Hash Tables /docs/en/application-note/AN2745.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Setting Up TSEC Hash Tables 112.0 KB AN2745 N 1091114676455721383781 /docs/en/application-note/AN2491.pdf 2003-09-30 1064950886097724682016 PSP 28 Sep 30, 2003 Application Note Simplified Mnemonics for PowerPC Instructions. None /docs/en/application-note/AN2491.pdf English documents 1379878 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2491.pdf Simplified Mnemonics for PowerPC Instructions /docs/en/application-note/AN2491.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Simplified Mnemonics for PowerPC Instructions 1.4 MB AN2491 N 1064950886097724682016 /docs/en/application-note/AN2582.pdf 2003-12-02 1070392201176701407042 PSP 1 Apr 3, 2007 Application Note Application Note Embedded systems that utilize double data rate memory (DDR) can realize increased performance over traditional single data rate (SDR) memories. As the name implies, DDR enables two data transactions to occur within a single clock cycle without having to double the applied clock or without having to double the size of the data bus. This increased data bus performance is achieved by the introduction of source-synchronous data strobes that permit data to be captured on both the falling and rising edges of the None /docs/en/application-note/AN2582.pdf English 839193 None Application Note 2022-12-07 /docs/en/application-note/AN2582.pdf Hardware and Layout Design Considerations for DDR Memory Interfaces /docs/en/application-note/AN2582.pdf documents 645036621402383989 Application Note N Y en None Y t789 pdf 6 N Hardware and Layout Design Considerations for DDR Memory Interfaces 839.2 KB AN2582 N 1070392201176701407042 /docs/en/application-note/AN2755.pdf 2005-02-08 1107896125362744400814 PSP 2 Apr 7, 2010 Application Note Application Note This document assists the user in creating descriptors for requirements not covered in the SEC 2.0 reference device driver. None /docs/en/application-note/AN2755.pdf English 765493 None Application Note 2022-12-07 /docs/en/application-note/AN2755.pdf SEC 2.0 Descriptor Programmer's Guide /docs/en/application-note/AN2755.pdf documents 645036621402383989 Application Note N Y en None Y t789 pdf 1 N SEC 2.0 Descriptor Programmer's Guide 765.5 KB AN2755 N 1107896125362744400814 /docs/en/application-note/AN2915.pdf 2006-01-12 1137095858557723377952 PSP 3 Mar 16, 2006 Application Note Application Note This application note discusses the architectural differences to consider when migrating from a PowerQUICC<sup>&#174;</sup> II to a PowerQUICC II Pro device. None /docs/en/application-note/AN2915.pdf English 619610 None Application Note 2022-12-07 /docs/en/application-note/AN2915.pdf Design Migration from the PowerQUICC<sup>&#174;</sup> II Family to the PowerQUICC II Pro Family /docs/en/application-note/AN2915.pdf documents 645036621402383989 Application Note N Y en None Y t789 pdf 1 N Design Migration from the PowerQUICC<sup>&#174;</sup> II Family to the PowerQUICC II Pro Family 619.6 KB AN2915 N 1137095858557723377952 Application Note Software 5 /secured/assets/documents/en/application-note-software/AN3966SW.zip 2016-10-31 1258066894053701788655 PSP 29 Nov 10, 2009 Application Note Software Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN3966SW.zip English documents 330857 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN3966SW&appType=license Software to accompany application note AN3966 /secured/assets/documents/en/application-note-software/AN3966SW.zip documents 789425793691620447 Application Note Software N en Extended zip 0 Y N Software to accompany application note AN3966 330.9 KB AN3966SW N 1258066894053701788655 /docs/en/application-note-software/AN3538SW.zip 2007-12-10 1197316910103728130595 PSP 30 Dec 10, 2007 Application Note Software None /docs/en/application-note-software/AN3538SW.zip English documents 193903 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3538SW.zip Software Package for Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup>&#8482; II Pro /docs/en/application-note-software/AN3538SW.zip documents 789425793691620447 Application Note Software N en None D zip 0 N Software Package for Enabling and Checking DDR ECC on PowerQUICC<sup>&#174;</sup>&#8482; II Pro 193.9 KB AN3538SW N 1197316910103728130595 /docs/en/application-note-software/AN3372.pdf 2016-10-31 1181767584945705509512 PSP 31 Jun 13, 2007 Application Note Software This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. None /docs/en/application-note-software/AN3372.pdf English documents 163681 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3372.pdf Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf documents 789425793691620447 Application Note Software N en None pdf 0 N Challenges in Testing for Power Rail Shorts with New Technologies 163.7 KB AN3372 N 1181767584945705509512 /docs/en/application-note-software/AN3373.pdf 2007-04-06 1175891986109734102869 PSP 32 Apr 6, 2007 Application Note Software This application note describes the steps required to initialize an MPC83xx device operating as a PCI agent. It compares initialization from the PCI host with initialization from the on-board e300 processor. It starts with an overview of the initialization process and then discusses key architectural considerations, hardware reset considerations, minimum initialization required to run software, and system implications. The procedure in this application note was performed with the MPC834x family, but it appl None /docs/en/application-note-software/AN3373.pdf English documents 460203 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3373.pdf PowerQUICC<sup>&#174;</sup> II Pro (MPC83xx) PCI Agent Initialization /docs/en/application-note-software/AN3373.pdf documents 789425793691620447 Application Note Software N en None D pdf 0 N PowerQUICC<sup>&#174;</sup> II Pro (MPC83xx) PCI Agent Initialization 460.2 KB AN3373 N 1175891986109734102869 /secured/assets/documents/en/application-note-software/AN2810SW.zip 2005-04-14 1113503860374718430905 PSP 33 Aug 15, 2006 Application Note Software AN2810, PowerQUICC<sup>&#174;</sup> UPM Configuration, PowerQUICC, Universal Programmable Machine, Configuration, Application Note Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN2810SW.zip English documents 5555 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN2810SW&appType=license AN2810 Supporting Files /secured/assets/documents/en/application-note-software/AN2810SW.zip documents 789425793691620447 Application Note Software N en Extended zip 2 Y N AN2810 Supporting Files 5.6 KB AN2810SW N 1113503860374718430905 Data Sheet 1 /docs/en/data-sheet/MPC8347EAEC.pdf 2006-03-10 1142032005270714045794 PSP 4 Sep 21, 2011 Data Sheet Data Sheet This document applies only to MPC8347EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). None /docs/en/data-sheet/MPC8347EAEC.pdf English 738381 None Data Sheet 2022-12-07 N /docs/en/data-sheet/MPC8347EAEC.pdf MPC8347EA Data Sheet /docs/en/data-sheet/MPC8347EAEC.pdf documents 980000996212993340 Data Sheet N Y en None Y t520 pdf 12 N N MPC8347EA Data Sheet 738.4 KB MPC8347EAEC N 1142032005270714045794 Errata 1 /docs/en/errata/MPC8349ECE.pdf 2005-05-03 1115153191110688318838 PSP 34 Aug 31, 2011 Errata This document describes all known silicon errata for the MPC8349E PowerQUICC<sup>&#174;</sup> II Pro family of integrated host processors. None /docs/en/errata/MPC8349ECE.pdf English documents 741505 None 155452329886410597 2022-12-07 N /docs/en/errata/MPC8349ECE.pdf MPC8349E PowerQUICC<sup>&#174;</sup> II Pro Family Device Errata /docs/en/errata/MPC8349ECE.pdf documents 155452329886410597 Errata N en None Y pdf 19 N N MPC8349E PowerQUICC<sup>&#174;</sup> II Pro Family Device Errata 741.5 KB MPC8349ECE N 1115153191110688318838 Fact Sheet 2 /docs/en/fact-sheet/MPC8349FS.pdf 2020-02-12 1082741064402718537545 PSP 35 Feb 12, 2020 Fact Sheet MPC8349E PowerQUICC<sup>&#174;</sup> II Pro None /docs/en/fact-sheet/MPC8349FS.pdf English documents 357530 None 736675474163315314 2022-12-07 N /docs/en/fact-sheet/MPC8349FS.pdf MPC8349E Fact Sheet /docs/en/fact-sheet/MPC8349FS.pdf documents 736675474163315314 Fact Sheet N en None Y pdf 7 N N MPC8349E Fact Sheet 357.5 KB MPC8349FS N 1082741064402718537545 /docs/en/fact-sheet/COMMEXPERTUSFS.pdf 2016-10-31 1226441429617720571652 PSP 36 Oct 15, 2008 Fact Sheet CommExpert (CE) is a powerful GUI-based tool that speeds and simplifies initialization, configuration and run time of the drivers and communications protocols managed by the QUICC Engine<sup>&#174;</sup>&#8482; based devices and other Power QUICC&#174; II Pro family devices. None /docs/en/fact-sheet/COMMEXPERTUSFS.pdf English documents 4088718 None 736675474163315314 2022-12-07 N /docs/en/fact-sheet/COMMEXPERTUSFS.pdf Freescale’s CommExpert Software /docs/en/fact-sheet/COMMEXPERTUSFS.pdf documents 736675474163315314 Fact Sheet N en None Y pdf 0 N N Freescale’s CommExpert Software 4.1 MB COMMEXPERTUSFS N 1226441429617720571652 Package Information 2 /docs/en/package-information/PBGAPRES.pdf 2002-04-17 Q1019076364374 PSP 37 Mar 14, 2008 Package Information Customer presentation on PBGA packages None /docs/en/package-information/PBGAPRES.pdf English documents 2767864 None 302435339416912908 2022-12-07 /docs/en/package-information/PBGAPRES.pdf PBGA Packaging Customer Tutorial /docs/en/package-information/PBGAPRES.pdf documents 302435339416912908 Package Information N en None Y pdf 3 N PBGA Packaging Customer Tutorial 2.8 MB PBGAPRES N Q1019076364374 /docs/en/package-information/TBGAPRESPKG.pdf 2003-08-05 1060112435258703527038 PSP 38 Dec 13, 2006 Package Information Presentation on understanding the TBGA packaging None /docs/en/package-information/TBGAPRESPKG.pdf English documents 9224392 None 302435339416912908 2022-12-07 /docs/en/package-information/TBGAPRESPKG.pdf TBGA Packaging Customer Tutorial /docs/en/package-information/TBGAPRESPKG.pdf documents 302435339416912908 Package Information N en None Y pdf 1 N TBGA Packaging Customer Tutorial 9.2 MB TBGAPRESPKG N 1060112435258703527038 Product Brief 1 /docs/en/product-brief/MPC8349EPB.pdf 2004-04-26 1083006931217706444736 PSP 39 Apr 26, 2004 Product Brief Product Brief None /docs/en/product-brief/MPC8349EPB.pdf English documents 379489 None 899114358132306053 2022-12-07 /docs/en/product-brief/MPC8349EPB.pdf MPC8349E Product Brief /docs/en/product-brief/MPC8349EPB.pdf documents 899114358132306053 Product Brief N en None Y pdf 1 N MPC8349E Product Brief 379.5 KB MPC8349EPB N 1083006931217706444736 Product Numbering Scheme 1 /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf 2005-03-28 1112027413689727091183 PSP 40 Jun 6, 2007 Product Numbering Scheme MPC834XE Family Part Number Scheme None /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf English documents 20129 None 554336734861737620 2022-12-07 /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf MPC834XE Family Part Number Scheme /docs/en/product-numbering-scheme/MPC834XEFAMPNS.pdf documents 554336734861737620 Product Numbering Scheme N en None Y pdf 1.3 N MPC834XE Family Part Number Scheme 20.1 KB MPC834XEFAMPNS N 1112027413689727091183 Reference Manual 5 /docs/en/reference-manual/MPC8349EARMAD.pdf 2006-07-12 1152739439331732884673 PSP 5 Mar 7, 2011 Reference Manual This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). None /docs/en/reference-manual/MPC8349EARMAD.pdf English documents 517305 None 500633505221135046 2022-12-07 /docs/en/reference-manual/MPC8349EARMAD.pdf Errata to MPC8349EA Reference Manual, Revision 1 NOTE: This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). /docs/en/reference-manual/MPC8349EARMAD.pdf documents 500633505221135046 Reference Manual N en None Y pdf 1.2 N Errata to MPC8349EA Reference Manual, Revision 1 NOTE: This document applies to MPC8349EA orderable part numbers with a revision suffix of A or B (silicon revision 3.x). 517.3 KB MPC8349EARMAD N 1152739439331732884673 /docs/en/reference-manual/e300CORERMAD.pdf 2010-01-20 1264006256879704515314 PSP 6 Jan 20, 2010 Reference Manual This addendum describes corrections to the e300 Power Architecture&#8482; Core Family Reference Manual, Revision 4. None /docs/en/reference-manual/e300CORERMAD.pdf English documents 424614 None 500633505221135046 2022-12-07 /docs/en/reference-manual/e300CORERMAD.pdf Errata to e300 Power Architecture&#8482; Core Family Reference Manual, Rev. 4 /docs/en/reference-manual/e300CORERMAD.pdf documents 500633505221135046 Reference Manual N en None Y pdf 4.1 N Errata to e300 Power Architecture&#8482; Core Family Reference Manual, Rev. 4 424.6 KB E300CORERMAD N 1264006256879704515314 /docs/en/reference-manual/e300coreRM.pdf 2005-04-12 1113346645199746873364 PSP 7 Dec 12, 2007 Reference Manual Supports e300c1, e300c2, e300c3, e300c4. The primary objective of this reference manual is to describe the functionality of the microprocessors in the e300 core family, which are PowerPC &#8482; microprocessors built on Power Architecture &#8482; technology. The e300 designs are based on the MPC603e microprocessor. None /docs/en/reference-manual/e300coreRM.pdf English documents 3862349 None 500633505221135046 2022-12-07 /docs/en/reference-manual/e300coreRM.pdf e300 Power Architecture &#8482; Core Family - Reference Manual /docs/en/reference-manual/e300coreRM.pdf documents 500633505221135046 Reference Manual N en None Y pdf 4 N e300 Power Architecture &#8482; Core Family - Reference Manual 3.9 MB E300CORERM N 1113346645199746873364 /docs/en/reference-manual/MPC8349EARM.pdf 2006-02-20 1140469818132695517073 PSP 8 Aug 28, 2006 Reference Manual This reference manual defines the functionality of the MPC8349EA, MPC8347EA, and MPC8343EA. It is written from the perspective a user of the MPC8349EA, which is the superset device. None /docs/en/reference-manual/MPC8349EARM.pdf English documents 8965351 None 500633505221135046 2022-12-07 /docs/en/reference-manual/MPC8349EARM.pdf MPC8349EA Reference Manual /docs/en/reference-manual/MPC8349EARM.pdf documents 500633505221135046 Reference Manual N en None Y pdf 1 N MPC8349EA Reference Manual 9.0 MB MPC8349EARM N 1140469818132695517073 /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf 2016-10-31 E966578690432 PSP 9 Oct 17, 2005 Reference Manual Programming Environments Manual for 32-Bit Implementations of the Power Architecture. Registration without Disclaimer /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf English documents 6125455 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=MPCFPE32B Programming Environments Manual for 32-Bit Implementations of the Power Architecture /secured/assets/documents/en/reference-manual/MPCFPE32B.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 3 Y N Programming Environments Manual for 32-Bit Implementations of the Power Architecture 6.1 MB MPCFPE32B N E966578690432 Supporting Information 2 /docs/en/supporting-information/FSLNISTCAVP.pdf 2016-11-09 1368836090577704535160 PSP 43 Oct 28, 2016 Supporting Information FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. None /docs/en/supporting-information/FSLNISTCAVP.pdf English documents 303546 None 371282830530968666 2022-12-07 N /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf documents 371282830530968666 Supporting Information N en None Y pdf 1.9 N N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 303.5 KB FSLNISTCAVP N 1368836090577704535160 /docs/en/supporting-information/MPC834XEPECI.pdf 2016-10-31 1232680179361697397466 PSP 44 Dec 10, 2010 Supporting Information Customer Export Control Information Document None /docs/en/supporting-information/MPC834XEPECI.pdf English documents 230796 None 371282830530968666 2023-06-19 N /docs/en/supporting-information/MPC834XEPECI.pdf MPC834x Customer Export Control Information /docs/en/supporting-information/MPC834XEPECI.pdf documents 371282830530968666 Supporting Information N en None Y pdf 2 N N MPC834x Customer Export Control Information 230.8 KB MPC834XEPECI N 1232680179361697397466 Training Presentation 2 /docs/en/supporting-information/BRQUICCENGEXBF.pdf 2016-10-31 1109956254586711181212 PSP 41 Feb 25, 2005 Training Presentation None /docs/en/supporting-information/BRQUICCENGEXBF.pdf English documents 331695 None 501713016990820713 2023-06-19 N /docs/en/supporting-information/BRQUICCENGEXBF.pdf The QUICC Engine: Freescale's Next-Generation Communications Processor Module (CPM) /docs/en/supporting-information/BRQUICCENGEXBF.pdf documents 501713016990820713 Training Presentation N en None Y pdf 1.0 N N The QUICC Engine: Freescale's Next-Generation Communications Processor Module (CPM) 331.7 KB BRQUICCENGEXBF N 1109956254586711181212 /docs/en/supporting-information/PQSECBKGRNDRPT.pdf 2003-10-20 1066686779430728245692 PSP 42 Apr 26, 2004 Training Presentation Background information on security objectives of PowerQUICC<sup>&#174;</sup> secure communications processors. None /docs/en/supporting-information/PQSECBKGRNDRPT.pdf English documents 466481 None 501713016990820713 2022-12-07 /docs/en/supporting-information/PQSECBKGRNDRPT.pdf Backgrounder: The Security Objectives of PowerQUICC<sup>&#174;</sup> Secure Communications Processors /docs/en/supporting-information/PQSECBKGRNDRPT.pdf documents 501713016990820713 Training Presentation N en None Y pdf 1 N Backgrounder: The Security Objectives of PowerQUICC<sup>&#174;</sup> Secure Communications Processors 466.5 KB PQSECBKGRNDRPT N 1066686779430728245692 White Paper 4 /secured/assets/documents/en/white-paper/CRYPTOWP.pdf 2016-10-31 1227561595497709456436 PSP 45 Aug 15, 2008 White Paper Network security protocols and applications use a variety of cryptographic algorithms to achieve these high-level goals. Because cryptography is computationally intensive, hardware acceleration is highly desirable when cryptographic algorithms are frequent system functions. Registration without Disclaimer /secured/assets/documents/en/white-paper/CRYPTOWP.pdf English documents 580121 None 918633085541740938 2022-12-07 Y /webapp/Download?colCode=CRYPTOWP Understanding Cryptographic Performance /secured/assets/documents/en/white-paper/CRYPTOWP.pdf documents 918633085541740938 White Paper N en Extended Y pdf 3 Y N Understanding Cryptographic Performance 580.1 KB CRYPTOWP N 1227561595497709456436 /docs/en/white-paper/DDRSDRAMWP.pdf 2016-10-31 1208376896761708228520 PSP 46 Apr 16, 2008 White Paper The focus of this white paper is to provide the end user with high level design considerations and/or trade-offs associated with migrating from SDRAM to DDR SDRAM-based designs. None /docs/en/white-paper/DDRSDRAMWP.pdf English documents 735286 None 918633085541740938 2023-06-19 N /docs/en/white-paper/DDRSDRAMWP.pdf Comparison of DDRx and SDRAM /docs/en/white-paper/DDRSDRAMWP.pdf documents 918633085541740938 White Paper N en None Y pdf 0 N N Comparison of DDRx and SDRAM 735.3 KB DDRSDRAMWP N 1208376896761708228520 /docs/en/white-paper/NANDFLASHWP.pdf 2016-10-31 1109024327078700240135 PSP 47 Oct 24, 2005 White Paper White Paper None /docs/en/white-paper/NANDFLASHWP.pdf English documents 246130 None 918633085541740938 2023-06-19 N /docs/en/white-paper/NANDFLASHWP.pdf How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash /docs/en/white-paper/NANDFLASHWP.pdf documents 918633085541740938 White Paper N en None Y pdf 1 N N How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash 246.1 KB NANDFLASHWP N 1109024327078700240135 /docs/en/white-paper/PublicKeyPerfWP.pdf 2016-10-31 1108068301263725831691 PSP 48 Feb 10, 2005 White Paper White Paper None /docs/en/white-paper/PublicKeyPerfWP.pdf English documents 73984 None 918633085541740938 2023-06-19 N /docs/en/white-paper/PublicKeyPerfWP.pdf Understanding Public-Key Performance /docs/en/white-paper/PublicKeyPerfWP.pdf documents 918633085541740938 White Paper N en None Y pdf 0 N N Understanding Public-Key Performance 74.0 KB PUBLICKEYPERFWP N 1108068301263725831691 true Y Products

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