Low-Ohmic Four-Pole Double-Throw Analog Switch
Design Files
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Layerscape® 1020A and 1022A Dual-Core Processors
The LS1 family, which includes the LS1020A and LS1022A communications processors, is built on Layerscape architecture, the industry’s first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale.
Members of the value-performance tier, the LS1020A and LS1022A processors provide extensive integration and power efficiency for fanless, small form factor enterprise and consumer networking applications. Incorporating dual Arm® Cortex®-A7 cores running up to 1.2 GHz, the LS1020A and LS1022A processors deliver pre-silicon CoreMark® performance of over 7,000, as well as virtualization support, advanced security features and broadest array of high-speed interconnects and optimized peripheral features ever offered in a sub-3 W processor (LS1022A processor is sub-2W typical).
The LS1020A and LS1022A processors features support for multiple industrial protocols, DDR3L/4 running up to 1600 MHz, integrated hardware-based security engine and QUICC Engine®. and ECC protection on both L1 and L2 caches. The LS1020 and LS1022A processors are pin- and software-compatible with the LS1021A processor.
Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.
Product Details
Block Diagram
Choose a diagram:
Features
Core Complex
- Dual Arm® v7 Cortex®-A7 32-bit cores, each supporting dual precision floating point and NEONSIMD module running up to 1.2 GHz (LS1020A) or 600 MHz (LS1022A)
- 32 KB instruction and data L1 cache with single bit error detection and correction, ECC protection on both instruction and data caches
- Up to 512 KB coherent L2 cache with single bit error detection and correction, ECC protection
Networking Elements
- SerDes
- 4 lane at up to 6 GHz (LS1020A)
- Supports SGMII, PCIe and SATA
- Ethernet
- 1 lane at up to 5 GHz (LS1022A)
- Supports PCIe®
- 4 lane at up to 6 GHz (LS1020A)
- Three virtualized enhanced triple-speed Ethernet controllers (VeTSEC) supporting SGMII (up to 2),RGMII, RMII, MII (LS1020A)
- Support IEEE® 1588
- Two virtualized enhanced triple-speed Ethernet controllers (VeTSEC) supporting RGMII, RMII, MII
- Support IEEE 1588
- Two PCIe Gen2 controllers (LS1020A)
- Supporting up to 5G/tps in 1-lane, 2-lane, or 4-lane (with a single controller)
- MSI supported
- One PCIe Gen2 controller
- Supporting up to 5G/tps in 1-lane
- MSI supported
Accelerators and Memory Control
- DDR memory controller supports DDR3L and DDR4 at up to 1600 MHz (LS1020A)
- 8-bit, 16-bit, 32-bit memory supported, with ECC support
- DDR memory controller supports DDR3L at up to 1000 MHz
- 8-bit, 16-bit memory supported, with ECC support
- Security Engine (SEC5.4) features five cryptographic hardware acceleration modules, true random number generator, hashing and CRC unit.
Basic Peripherals and Interconnect
- Arm Cache Coherent Interconnect (CCI400)
- Arm AMBA4 MPCore Virtualization
- Integrated Flash controller supporting 16-bit interface
- QuadSPI Flash controller
- USB3.0 superspeed controller with integrated PHY, supporting OTG, Host and Device modes (LS1020A)
- USB2.0 controller supporting OTG, Host and Device modes
- SD/MMC controller
- SATA3 controller supporting 6G/tps
- 3x I²C
- 2x SPI
Comparison Table
| LS1021A | LS1020A | LS1022A | |
|---|---|---|---|
| Cores | 2 | 2 | 2 |
| Core Frequency | Up to 1.2 GHz | Up to 1.2 GHz | Up to 600 MHz |
| SerDes | 4 Lanes | 4 Lanes | 1 Lanes |
| Security | SEC 5.4 | SEC 5.4 | SEC 5.4 |
| DDR 4 | Yes | Yes | No |
| USB 3.0 | Yes | Yes | No |
| LCD Support | Yes | No | No |
We recommend the following Power Management IC for LS1020A and LS1022A Processors
Select the specifications below to find the perfect fit for your design
| PMIC Part Number | Description | External Memory Voltage (V) | Ambient Operating Temperature (Min-Max) (°C) | Qualification Tier |
|---|---|---|---|---|
| MC34VR500V1ES | Regulator, Buck, Quad with up to 4.5A Output and Triple User-programmable LDOs, QFN 56 | 1.35 | -40 to 105 | Industrial |
| MC34VR500V2ES | Regulator, Buck, Quad with up to 4.5A Output and Factory programmed LDOs, QFN 56 | 1.35 | -40 to 105 | Industrial |
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Layerscape® 1021A Dual-Core Processor with LCD Controller
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Documentation
Quick reference to our documentation types.
1-5 of 30 documents
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Fact Sheet
Layerscape 1020A and LS1022A - Fact SheetFeatured
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White Paper
Networking for Industrial and IoT Applications - White PaperFeatured
Design Resources
Hardware
Quick reference to our
board types.
3 hardware offerings
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Evaluation and Development BoardsLayerscape LS1021A Tower® System ModuleFeatured
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Emulators, Probes, and ProgrammersLS Processor Probe Tips for CodeWarrior TAP
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Emulators, Probes, and ProgrammersCodeWarrior® TAP
Software
Quick reference to our software types.
2 software files
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Development IDEs and Build Tools
CodeWarrior® Development Suites for Networked ApplicationsFeatured
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BSPs and Device Drivers
Linux® SDK for QorIQ® Processors
Note: For better experience, software downloads are recommended on desktop.
Engineering Services
To get further assistance directly from NXP, please see our Engineering Services.
1-5 of 27 engineering services
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Independent Design House (IDH)
Full integration Support and Customization
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Independent Design House (IDH)
Schematic Integrity AI Analysis
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Independent Design House (IDH)
Custom Layerscape AIOP microcoding
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Independent Design House (IDH)
Android and Linux Engineering Support
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To find additional partner offerings that support this product, visit our Partner Marketplace.
Training
2 trainings