Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Buy Options
MPC8572EVTAULE
End of Life
12NC: 935314429557
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Security Status | COMPANY PUBLIC |
Description | PowerQUICC 32-Bit Power Arch SoC, 2 X 1.33GHz, DDR2/3, PCIe, GbE, SRIO, SEC, 0 to 105C, R2.2.1 |
| Parameter | Value |
|---|---|
Number of pins | 1023 |
Package Style | BGA |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|---|
MPC8572EVTAULE(935314429557) | No | Yes Certificate Of Analysis (CoA) | Yes |  | e2 | REACH SVHC | 12966.6 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||
MPC8572EVTAULE (935314429557) | No | 3 | 245 | 245 | 30 | 30 | |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
MPC8572EVTAULE (935314429557) | 854231 | 5A002A1 |
Discontinued and Replacement Part Data
| Part/12NC | Discontinuance Notice | Last Time Buy Date | Last Time Delivery Date | Replacement |
|---|---|---|---|---|
MPC8572EVTAULE (935314429557) | - | 2015-09-26 | 2016-09-25 | MPC8572EVJAULE (935312116557) |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
MPC8572EVTAULE (935314429557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
MPC8572EVTAULE (935314429557) | 2017-12-20 | 2018-01-03 | 201710023I | New PQ Label Input for Non-MPQ Shipments |
More about MPC8572E
MPC8572 device is "Not recommended for new designs", please use the replacement families Power Architecture (T1040 ,T1042), T4080), Arm Architecture (LS1026, LS2044).
NXP’s next-generation PowerQUICC® III integrated communications processors are designed to provide solutions for symmetrical and asymmetrical multi-core systems. Based on the scalable e500 processor and system-on-chip (SoC) platform, they deliver dual-core gigahertz plus processing performance with advanced content processing and security features.
The MPC8572E family of processors offers clock speeds from 1.2 GHz up to 1.5 GHz, combining two powerful e500 processor cores built on Power Architecture® technology, enhanced peripherals and high-speed interconnect technology to balance processor performance with I/O system throughput. These processors also contain application acceleration blocks such as a table lookup unit (TLU) that offloads complex table searches and header inspections, a pattern-matching engine to handle regular expression matching with a deflate engine to manage file decompression and a security engine that accelerates crypto operations in IPsec and SSL/TLS for VPNs.
Based on NXP®.s 90 nm silicon-on-insulator (SOI) copper interconnect process technology, the MPC8572E is designed to deliver higher performance with lower power dissipation. The MPC8572E processors provide a significant performance increase and represent continuous innovation from the popular PowerQUICC family. With uncompromising integration, the MPC8572E platform builds on the embedded core performance of Power Architecture technology and adds new features to enhance traffic management and security acceleration.
Support for high-speed interfaces on the MPC8572E enables scalable connectivity to network processors and/or ASICs in the data plane while the MPC8572E platform handles complex, computationally demanding control plane processing tasks. These processors include dual memory controllers supporting DDR2 and DDR3 for future proofing and error correction codes for high reliability, enhanced Gigabit Ethernet (GbE) support and double precision floating point.