Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Buy Options
MPC8560VT833LC
End of Life
12NC: 935321158557
Details
Order
Operating Features
| Parameter | Value |
|---|---|
External Memory Supported | DDR SDRAM, SDRAM, SRAM |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|---|
MPC8560VT833LC(935321158557) | No | Yes Certificate Of Analysis (CoA) | Yes |  | e2 | REACH SVHC | 4543.7 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||
MPC8560VT833LC (935321158557) | No | 3 | 260 | 260 | 40 | 40 | |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
MPC8560VT833LC (935321158557) | 854231 | 3A991A2 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
MPC8560VT833LC (935321158557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
MPC8560VT833LC (935321158557) | 2017-12-20 | 2018-01-03 | 201710023I | New PQ Label Input for Non-MPQ Shipments |
More about MPC8560
The PowerQUICC® III is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications, excelling particularly in communications and networking products. Our PowerQUICC III processor family is the next generation of integrated communications processors. The PowerQUICC III provides higher performance in all areas of device operation, including greater flexibility, extended capabilities, and higher integration.
Our leading PowerQUICC III architecture integrates two processing blocks. One block is a high-performance embedded e500 core. With 256 KB of level 2 cache, the e500 core is built on Power Architecture® technology and provides unprecedented levels of hardware and software debugging support. The second block is the communications processor module (CPM). The CPM of the PowerQUICC III can support three fast serial communications controllers (FCCs), two multichannel controllers (MCCs), four serial communications controllers (SCCs), one serial peripheral interface (SPI) and one I²C interface.
The PowerQUICC III also offers two integrated 10/100/1000 Ethernet controllers, a DDR SDRAM memory controller, a 64-bit PCI-X/PCI controller, and a RapidIO® interconnect. This high level of integration helps simplify board design and offers significant bandwidth and performance for high-end control-plane and data-plane applications.
Access to the errata document for this device requires an NDA. Contact your local NXP Sales Office or NXP Authorized Distributor.