UJA1023T | LIN-I/O Follower | NXP Semiconductors

LIN-I/O Follower

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Product Details

Features

Key Features

  • Automatic bit rate synchronization to any (leader) bit rate between 1 kbit/s and 20 kbit/s
  • Integrated LIN 2.0 / SAE J2602 transceiver (including 30 kΩ termination resistor)
  • Eight bidirectional I/O pins
  • 4 x 2, 4 x 3, or 4 x 4 switch matrix to support reading and supplying a maximum number of 16 switches
  • Outputs configurable as high-side and/or low-side driver and as cyclic or PWM driver
  • 8-bit ADC
  • Advanced low-power behavior
  • On-chip oscillator
  • Node Address (NAD) configuration via daisy chain or plug coding
  • Inputs supporting local wake-up and edge capturing
  • Configurable Sleep mode
  • Limp home configuration in case of error conditions
  • Very low electromagnetic emission
  • High immunity against electromagnetic interference
  • Bus line protected in accordance with ISO 7637
  • Extended ambient temperature range (-40 Cel to +125 Cel)

Buy/Parametrics

1 result

Include 0 NRND

Order

CAD Model

Status

Recommended Orderable Part Number

Additional Features - Analog

Product Category

Supply Voltage [Min to Max] (V)

Data Rate [max] kbps

Number of LIN Channels

Package Type

Active

UJA1023T/2R04/C,51

8x I/O - LIN configurable, ADC, Cyclic wake, HS/LS driver, INH, LIN 2.0, NAD, PWM, auto bit rate detection, limp home

LIN-I/O slave

5.5 to 27

20.0

1

SO16

Documentation

Quick reference to our documentation types.

2 documents

Compact List

Application Note (1)
  • AN10704[AN10704]
Data Sheet (1)

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