Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Buy Options
PCA9614DPZ
Active
12NC: 935298545431
Details
Operating Features
| Parameter | Value |
|---|---|
Inputs | 1 |
Outputs | 1 |
Type Of Offset | Static Offset |
| Parameter | Value |
|---|---|
Supply Voltage [Min to Max] (V) | 2.3 to 5.5, 3 to 5.5 |
Frequency (Max) (MHz) | 1 |
Operating Temperature (Min-Max) (℃) | -40 to 85 |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
PCA9614DPZ(935298545431) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 23.540380000000003 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | FIT | MTBF | IR | ||
|---|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||||
PCA9614DPZ (935298545431) | No | 1 | 1 | 240 | 260 | 4.0 | 2.5E8 | 0.0 |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer |
|---|---|
PCA9614DPZ (935298545431) | 854239 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
PCA9614DPZ (935298545431) | 2021-10-05 | 2022-01-04 | 202104008F01 | SOT552-1 Transfer from ATP-1 to ASEN |
PCA9614DPZ (935298545431) | 2021-05-24 | - | 202104008A | SOT552-1 Transfer from ATP-1 to ASEN |
More about PCA9614DP
The PCA9614 is a Fast-mode Plus (Fm+) SMBus/I²C-bus buffer that extends the normal single-ended SMBus/I²C-bus through electrically noisy environments using a differential SMBus/I²C-bus (dI²C) physical layer, which is transparent to the SMBus/I²C-bus protocol layer. It consists of two single-ended to differential driver channels for the SCL (serial clock), SDA (serial data).
The use of differential transmission lines between identical dI²C bus buffers removes electrical noise and common-mode offsets that are present when signal lines must pass between different voltage domains, are bundled with hostile signals, or run adjacent to electrical noise sources, such as high energy power supplies and electric motors.
The SMBus/I²C-bus was conceived as a simple slow speed digital link for short runs, typically on a single PCB or between adjacent PCBs with a common ground connection. Applications that extend the bus length or run long cables require careful design to preserve noise margin and reject interference.
The I²C-bus buffers were designed to solve these problems and are ideally suited for rugged high noise environments and/or longer cable applications, allow multiple targets, and operate at bus speeds up to 1 MHz clock rate. Cables can be extended to at least three meters (3 m), or longer cable runs at lower clock speeds. The dI²C-bus buffers are compatible with existing SMBus/I2C-bus devices and can drive Standard, Fast-mode, and Fast-mode Plus devices on the single-ended side.
Signal direction is automatic and requires no external control. To prevent bus latch-up the I²C-bus side employs static level offset. Take care when connecting the PCA9614 to other SMBus/I²C-bus buffers that do not operate with other static level offset bus buffers.
These devices are a bridge between the normal 2-wire single-ended wired-OR SMBus/I²C-bus and the 4-wire dI²C-bus.
The PCA9614 has two supply voltages, VDD(A) and VDD(B). VDD(A), the card side supply, only serves as a reference and ranges from 2.3 V to 5.5 V. VDD(B), the line side supply, serves as the majority supply for circuitry, and ranges from 3.0 V to 5.5 V.