PCA9601 | NXP Semiconductors

Dual Bidirectional Bus Buffer

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Product Details

Block Diagram

PCA9601 Block Diagram

PCA9601 Block Diagram

Features

System Features

  • Bidirectional data transfer of I²C-bus signals
  • 15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads
  • Isolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side
  • 1 MHz operation on up to 20 meters of wire (see AN10658)
  • Supply voltage range of 2.5 V to 15 V with I²C-bus logic levels on SX/SY side independent of supply voltage
  • Splits I²C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths
  • Low power supply current
  • ESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO8 and TSSOP8 (MSOP8)

Buy/Parametrics

2 results

Include 0 NRND

Order

CAD Model

Status

Budgetary Price excluding tax

Inputs

Outputs

Type Of Offset

Supply Voltage [Min to Max] (V)

Frequency (Max) (MHz)

Operating Temperature (Min-Max) (℃)

Package Type

Active

1K @ US$1.71

1

1

Static Offset

2.5 to 15

1

-40 to 85

SO8

Active

1K @ US$1.87

1

1

Static Offset

2.5 to 15

1

-40 to 85

TSSOP8

Documentation

Quick reference to our documentation types.

9 documents

Compact List

Application Note (2)
Data Sheet (1)
Package Information (1)
Packing Information (2)
Supporting Information (3)

Design Files

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4 design files

Software

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2 software files

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Engineering Services

1 engineering service

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