Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
PowerQUICC, 32 Bit Power Architecture SoC, 333MHz e300, QE, PCI, USB2.0, DDR1/2, SEC, 0-105C
Package
BGA516: BGA516, plastic, ball grid array; 516 balls; 1 mm pitch; 27 mm x 27 mm x 1.95 mm body
Buy Options
MPC8321EVRAFDCA
NRND
12NC: 935325716557
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Core Type | e300 |
Operating Frequency [Max] (MHz) | 333 |
External Memory Supported | DDR1 SDRAM, DDR2 SDRAM, EPROM, SDRAM |
| Parameter | Value |
|---|---|
Ambient Operating Temperature (Min to Max) (℃) | 0 to 105 |
Ethernet Type | 10/100 BaseT |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|---|
MPC8321EVRAFDCA(935325716557) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | e2 | REACH SVHC | 4374.4 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Free Soldering | Lead Free Soldering | Lead Free Soldering | |||||
MPC8321EVRAFDCA (935325716557) | No | 3 | 260 | 40 | |||
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) | CCATS |
|---|---|---|---|
MPC8321EVRAFDCA (935325716557) | 854231 | 5A002A1 | G145003 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
MPC8321EVRAFDCA (935325716557) | 2025-04-16 | 2025-05-26 | 202504007I | Freescale Logo to NXP Logo Product Marking Conversion for All Remaining Former Freescale Products |
MPC8321EVRAFDCA (935325716557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
MPC8321EVRAFDCA (935325716557) | 2017-12-20 | 2018-01-03 | 201710023I | New PQ Label Input for Non-MPQ Shipments |
More about MPC8321E
The MPC8321E PowerQUICC®. II Pro is a member of the MPC8323E family of cost-effective network communications processosr that meet the requirements of several small office/home office (SOHO), access, IP services and industrial control applications. It provides better CPU performance, additional functionality and faster interfaces than current PowerQUICC™ II processors while addressing important time to market, price, power consumption and board real estate requirements
Core Complex
The MPC8321E incorporates a unique configuration of the e300c2 (MPC603e-based) core. While this version of e300 core does not have a Floating-Point Unit (FPU) it has been designed to include dual integer units as well as a modified multiply instruction. These architectural enhancements enable more efficient operations to be executed in parallel, resulting in significant performance improvement. The core also includes 16 Kbytes of L1 instruction and data caches and on-chip memory management units (MMUs). The MPC8321E also includes a 32-bit PCI controller, four DMA channels, a flexible local bus, and a 32-bit DDR-1/DDR-2 SDRAM memory controller..
QUICC Engine™ Technology
A new single-RISC version of the QUICC Engine™ communications engine forms the heart of the networking capability of the MPC8321E. The QUICC Engine® block contains several peripheral controllers and a single 32-bit reduced instruction set computing (RISC) controller. Unique microcode packages provide support for NAT, Firewall, IPSec, and Advanced Quality of Service (QoS). Protocol support is provided by the main workhorses of the device - the unified communication controllers (UCCs). Each of the five UCCs can support a variety of communication protocols:
- Up to (3) 10/100 Mbps Ethernet
- High-level data link control (HDLC)
- Up to (4) Time division multiplexing (TDM)
- Binary synchronous communications protocol (BISYNC)
- UCC can also support USB 2.0 (full/low speed)
Hardware Security Engine
The security engine (SEC 2.2) on the MPC8321E allows CPU-intensive cryptographic operations to be off-loaded from the main CPU core. The security-processing accelerator provides hardware acceleration for DES, 3DES, Advanced Encryption Standard (AES), Secure Hash Algorithm (SHA)-1 and MD-5 algorithms.
System Interface Unit
The MPC8321E family also includes a 32-bit double data rate (DDR)-1/DDR/2 memory controller, a 32-bit peripheral component interconnect (PCI) controller, a 16-bit local bus and four direct memory access (DMA) channels.
Typical Applications
- Residential gateways
- SOHO networking
- VPN routers
- Access points
- DSLAM line cards
- Industrial control
- Test and measurement equipment