Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Buy Options
DSP56F807VF80
End of Life
12NC: 935323918557
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Flash (kB) | 128 |
RAM (kB) | 4 |
Operating Frequency [Max] (MHz) | 80 |
| Parameter | Value |
|---|---|
CAN | 1 |
SPI | 1 |
Environmental
| Part/12NC | PbFree | EU RoHS | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
DSP56F807VF80(935323918557) | No | No |  | e0 | REACH SVHC | 544.9 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Soldering | Lead Soldering | |||||
DSP56F807VF80 (935323918557) | No | 3 | 220 | 30 | |||
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
DSP56F807VF80 (935323918557) | 854231 | 3A991A2 |
Discontinued and Replacement Part Data
| Part/12NC | Discontinuance Notice | Replacement |
|---|---|---|
DSP56F807VF80 (935323918557) | - | DSP56F807VF80E (935323919557) |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
DSP56F807VF80 (935323918557) | 2025-04-16 | 2025-05-26 | 202504006I | Freescale Logo to NXP Logo Product Marking Conversion for All Remaining Former Freescale Products |
DSP56F807VF80 (935323918557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about DSP56F807
The 56F807, a member of the 56800 core-based family of Digital Signal Controllers, combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip. This creates an extremely cost-effective solution for servo and motor control, power inverter and converter applications.
The 56800 core is based on a Harvard-style architecture consisting of three execution units which operate in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP-and MCU-style applications. The instruction set is also highly efficient for C compilers, enabling rapid development of optimized control applications.