Two-Channel I²C-Bus Multiplexer and Interrupt Logic | NXP Semiconductors

Two-Channel I²C-Bus Multiplexer and Interrupt Logic

Product Details

Block Diagram

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PCA9542A

PCA9542A Block Diagram

PCA9542AD, PCA9542APW

Features

Key Features

  • 1-of-2 bidirectional translating multiplexer
  • I²C-bus interface logic; compatible with SMBus
  • 2 active LOW interrupt inputs (INT0, INT1)
  • Active LOW interrupt output (INT)
  • 3 address pins allowing up to 8 devices on the I²C-bus
  • Channel selection via I²C-bus
  • Power-up with all multiplexer channels deselected
  • Low Ron switches
  • Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5 V tolerant Inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO14, TSSOP14

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Documentation

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10 documents

Compact List

Application Note (1)
  • AN262[AN262]
Brochure (1)
Data Sheet (1)
Fact Sheet (1)
Package Information (2)
Packing Information (1)
Supporting Information (1)
User Guide (2)

Design Resources

Design Files

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3 design files

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