Application Note (14)
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Understanding SYSCLK Jitter[AN4056]
The MPC859DSL Integrated Communications Controller is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in CPE applications including DSL modems, IADs, and residential gateways. Like the MPC866, the MPC859DSL is a 0.18 micron version of the PowerQUICC® Family and can operate up to 66 MHz on the MPC8xx core. It has a 1.8 V core and a 3.3 V I/O operation.
The MPC859DSL is a Power Architecture-based derivative of NXP® Semiconductors' Quad Integrated Communications Controller (PowerQUICC). The embedded CPU on the MPC859DSL is the MPC8xx core, a 32-bit microprocessor built on Power Architecture technology, incorporating memory management units (MMUs) and instruction and data caches. The memory controller supports many memory types, including SDRAM. The CPM (Communications Processing Module) is optimized for CPE applications supporting simultaneous operation of Fast Ethernet (MII) and parallel ATM (UTOPIA), UTOPIA II Multi-PHY (up to 4 addresses), and many more features.
Qual | Process | Mask | IMMR [16:31] | |
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Rev 0.3 | MC | HiP6W | 3L90H | 0x0800 |
Rev A.0 | MC | HiP6W | 0L96R | 0x0801 |
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MPC859DSL
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