FlexRay Communication Controller

  • This page contains information on a product that is not recommended for new designs.

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Block Diagram

MFR4310BLKDIAG

Features

  • Conforms to FlexRay Communications System Protocol Specification V2.1A
  • Variable bit rate support: 2.5, 5, 8, or 10 Mb/s
  • 128 configurable message buffers
  • Message buffer header, status and payload data are stored in 6 KB of on-chip system memory
  • Two independent message buffer segments with configurable size of payload data section
  • Transmit message buffers configurable with state/event semantics
  • Individual message buffer reconfiguration supported
  • Two independent receive FIFOs
  • 4 configurable slot error counters
  • 4 dedicated slot status indicators
  • 1 absolute timer
  • 1 timer that can be configured to absolute or relative

Part numbers include: MFR4310E1MAE40.

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Documentation

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Design Files

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1 design file

Hardware

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1 hardware offering

Software

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2 software files

Note: For better experience, software downloads are recommended on desktop.

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