LPC SPIFI Peripheral

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Diagram

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LPC-SPIFI-PERIPHERAL-BD1

 LPC-SPIFI-PERIPHERAL-BD1

LPC-SPIFI-PERIPHERAL-BD2

 LPC-SPIFI-PERIPHERAL-BD2

LPC-SPIFI-PERIPHERAL-BD3

 LPC-SPIFI-PERIPHERAL-BD3

Features

  • Quad SPI Flash Interface (SPIFI) to external flash.
  • Transfer rates of up to SPIFI_CLK/2 bytes per second.
  • External flash is directly memory mapped for fast access.
  • Supports 1-, 2-, and 4-bit bi-directional serial protocols.
  • Transfer protocol compatible with various vendors and devices.
  • The SPIFI memory is accessible by the DMA.
  • Software driver library is available.
  • Supports execute-in-place (direct code execution from the SPI Flash memory) and general read/write/erase operations.
  • Built-in cache to give high-performance code execution.
  • Allows designers to use a small, inexpensive serial flash in place of larger, more expensive parallel flash.
  • With SPIFI, the external serial flash appears in the microcontroller’s memory map and can be read like other on-chip memory.

Downloads

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3 downloads

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Documentation

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2 documents

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