Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
High Performance 32-bit Microcontroller based on Arm® Cortex®-M4/M0
Buy Options
LPC43S67JBD208E
Active
12NC: 935306447551
Details
Order
Operating Features
| Parameter | Value |
|---|---|
ADC (bits) | 10 |
ADC (Channels) | 2 |
USB | 2 x USB |
Core: Number of cores (SPEC) | 1 |
GPIO | 142 |
Free Programmable CPU | Arm Cortex-M4 |
Supply Voltage [Min - Max] | 2.2, 3.6 |
ADC | 2 |
CAN | 2 |
Operating Frequency [Max] (MHz) | 204 |
ADC COUNT CLOUD | 2 |
Frequency (Max) (kHz) | 204000 |
Product category | 190-LPC4300- |
Supply Voltage [max] (V) | 3.6 |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 105 |
Supply Voltage [min] (V) | 2.2 |
Peripherals | ADC, CAN, I²C, SPI, UART, USB |
Memory Size (B) | 16, 136000, 1024000 |
PHY | CAN |
Supply Voltage [Min to Max] (V) | 2.2 to 3.6 |
Peripheral Type | ADC, CAN, I²C, SPI, UART, USB |
ADC (bits) | 10 |
USB (speed) | HS (2x) |
Serial Communication | 2 x I²C, 3 x SPI, 4 x UART |
ADC [Number, bits] | 2 x 10 |
CAN Channels | 2 |
Core Type | 1 x Arm Cortex-M4 |
User Non volatile memory size [kB] | 0 |
Number of pins | 208 |
Package Style | LQFP |
Peripheral Type | ADC, CAN, I²C, SPI, UART, USB |
SRAM (Bytes) | 136000 |
eTSEC | 15 |
| Parameter | Value |
|---|---|
TDM | 15 |
I2C | 2 |
J1850 | 15 |
SLIC | 15 |
Security Status | COMPANY PUBLIC |
SPI | 3 |
EEPROM (kB) | 0.016 |
Operating Voltage [Min to Max] (V) | 2.2 to 3.6 |
ADC Resolution | 10 |
Internal Memory Supported | EEPROM, FLASH, SRAM |
IBIZ LOADER | Arm Cortex-M4 |
CLOUD_PROD3_NXP_CLOCK_SPEED_MAX | 204 |
UART | 4 |
Flash (kB) | 1024 |
Pad supply (V) | 2.2 to 3.6 |
USB (type) | host/device |
CLOUD_PROD2_NXP_CLOCK_SPEED_MAX | 204 |
USB Controllers | 2 |
MCU Internal User Flash (SPEC) (kByte) | 1024 |
ADC sample rate | 400 ksps |
Communication protocol | ADC, CAN, I²C, SPI, UART, USB |
EEPROM (Bytes) | 16 |
CLOUD PROD - Operating Frequency [Max] (MHz) | 204 |
SRAM (kB) | 136 |
SCTimer / PWM | 1 |
Core Type | Arm Cortex-M4 |
Operating Temperature (Min-Max) (℃) | -40 to 105 |
Arm Core | Arm Cortex-M4 |
Independent ADC Modules | 2 |
Master Interface | ADC, CAN, I²C, SPI, UART, USB |
Controller Interface | ADC, CAN, I²C, SPI, UART, USB |
Operating Frequency [Max] (MHz) | 204 |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
LPC43S67JBD208E(935306447551) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 1.0 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | ||
|---|---|---|---|---|---|
| Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | ||
LPC43S67JBD208E (935306447551) | No | 3 | 3 | 240 | 260 |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
LPC43S67JBD208E (935306447551) | 854231 | 5A992 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
LPC43S67JBD208E (935306447551) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about LPC43S67JBD208
The LPC43S6x are Arm Cortex-M4 based microcontrollers for embedded applications which include an Arm Cortex-M0 coprocessor and an Arm Cortex-M0 subsystem for managing peripherals, up to 1 MB of flash and 154 kB of on-chip SRAM, 16 kB of EEPROM memory, a quad SPI Flash Interface (SPIFI), advanced configurable peripherals such as the SCTimer/PWM and the Serial General Purpose I/O (SGPIO) interface, security features with AES engine, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals. The LPC43S6x operate at CPU frequencies of up to 204 MHz.
The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated into the core.
The LPC43S6x include an application Arm Cortex-M0 coprocessor and a second Arm Cortex-M0 subsystem for managing the SGPIO and SPI peripherals.The Arm Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which is upward code- and tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor, designed as a replacement for existing 8/16-bit microcontrollers, offers up to 204 MHz performance with a simple instruction set and reduced code size. The Cortex-M0 coprocessor hardware multiply is implemented as a 32-cycle iterative multiplier.