QorIQ® P5020 and P5010 64-bit Dual- and Single-Core Communications Processors
Design Files
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QorIQ® P5040/5021 64-bit Dual- and Quad-Core Communications Processors
- This page contains information on a product that is not recommended for new designs.
P5040 device is "Not recommended for new designs", please use the replacement families Power Architecture (T4080), Arm Architecture (LS1046, LS2044, LS2080).
The QorIQ® P5 family delivers scalable, 64-bit processing with single-, dual-, and quad-core devices. With frequencies scaling up to 2.2 GHz, a tightly coupled cache hierarchy for low latency, and integrated hardware acceleration, the P5040 (quad-core) and P5021 (dual-core) devices are ideally suited for compute-intensive, power-conscious control plane applications.
Product Details
Features
Core Complex
- Four (P5040) or two (P5021) single-threaded e5500 cores built on Power Architecture® technology
- Up to 2.2 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
- Three levels of instruction: user, supervisor, hypervisor
- Hybrid 32-bit mode to support legacy software and transition to 64-bit architecture
- 2.0 MB configures as dual 1 MB platform cache
Networking Elements
- SerDes
- 20 lanes at up to 5 Gbps
- Supports SGMII, XAUI, PCI Express® (PCIe) rev1.1/2.0, SATA
- Ethernet interfaces
- Two 10 Gbps Ethernet MACs
- Ten 1 Gbps Ethernet MACs
Accelerators and Memory Control
- Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support
- Up to 1600MT/s
- DPAA incorporating acceleration for the following functions
- Packet parsing, classification, and distribution (FMAN)
- Queue management for scheduling, packet sequencing and congestion management (QMAN)
- Hardware buffer management for buffer allocation and de-allocation (BMAN)
- Cryptography acceleration (SEC 5.2) at up to 20Gbps
- RAID 5 and 6 storage accelerator with support for end-to-end data protection information
Basic Peripherals and Interconnect
- Three PCIe 2.0/3.0 controllers
- Two serial ATA (SATA 2.0) controllers
- Two high-speed USB 2.0 controllers with integrated PHY
- Enhanced secure digital host controller (SD/MMC/eMMC)
- Four I²C controllers
- Two DUARTs
- Integrated flash controller supporting NAND and NOR flash
- Two 4-channel DMA engines
Additional Features
- Support for hardware virtualization and partitioning enforcement
- Extra privileged level for hypervisor support
- QorIQ® trust architecture 1.1
- Secure boot, secure debug, tamper detection, volatile key storage
Comparison Table
| P5040 | P5021 | |
|---|---|---|
| Cores | 4 | 2 |
| Core Frequency | 1.8 to 2.2 GHz | 1.8 to 2.2 GHz |
| L2 Cache | 512 KB | 512 KB |
| L3/Platform Cache | 2 MB | 2 MB |
| DDR3 | 2x 64-bit | 2x 64-bit |
| GbE | 10x 1 GbE 2x 10 GbE | 10x 1 GbE 2x 10 GbE |
| SERDES | 20 Lanes | 20 Lanes |
| Security | Trust | Trust |
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Documentation
Quick reference to our documentation types.
1-5 of 21 documents
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Brochure
QorIQ P2040/P2041, P3 and P5 Series - BrochuresFeatured
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Fact Sheet
QorIQ® P5040/P5021 Communications Processors - Fact SheetFeatured
Design Resources
Software
Quick reference to our software types.
3 software files
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Development IDEs and Build Tools
CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVALFeatured
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BSPs and Device Drivers
Linux® SDK for QorIQ® Processors
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Development IDEs and Build Tools
CodeWarrior® Development Suites for Networked Applications
Note: For better experience, software downloads are recommended on desktop.