Second Generation High-Performance General Purpose Switch

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Block Diagram

CBTL06GP213 Block Diagram

CBTL06GP213 Block Diagram

Features

Key Features

  • 1 : 2 switching or 2 : 1 multiplexing of DisplayPort (v1.2 - 5.4 Gbit/s) PCI Express (v2.0 - 5.0 Gbit/s) signals
  • USB3 SuperSpeed or HDMI 2.0 (6 Gbit/s) TMDS signals
  • 4 high-speed differential channels with 2 : 1 muxing/switching for DisplayPort or PCI Express or HDMI signals
  • 1 channel with 4 : 1 or 4 : 2 muxing/switching for AUX at 1 Mbit/s or DDC signals, USB2 signals
  • 1 channel with 2 : 1 muxing/switching for single-ended HPD signal
  • High-bandwidth analog pass-gate technology
  • Supports high-speed signal switching over a wide common-mode range and differential swing
  • RON on DP high-speed channels: 7 Ω
  • -3 dB bandwidth at 9.5 GHz
  • Low crosstalk: -32 dB at 2.7 GHz
  • Low off-state isolation: -23 dB at 2.7 GHz
  • Low return loss: -19 dB at 2.7 GHz
  • Very low intra-pair skew (5 ps typical)
  • Very low inter-pair skew (< 80 ps)
  • Switch/multiplexer position select CMOS input
  • Shutdown mode CMOS input
  • Supports backdrive protection
  • Single 3.3 V power supply
  • Operation current of 490 μA typical, shut-down current 10 μA maximum
  • ESD 2 kV HBM, 500 V CDM
  • Available in 5 mm x 5 mm, 0.5 mm ball pitch TFBGA50 package
  • Motherboard applications requiring DisplayPort, HDMI, PCI Express, and USB switching/multiplexing
  • Chip sets requiring flexible allocation of PCI Express or DisplayPort I/O pins to board connectors

Low Insertion Loss

  • -0.9 dB at 100 MHz
  • -1.1 dB at 1.35 GHz
  • -1.3 dB at 2.7 GHz

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Documentation

Quick reference to our documentation types.

2 documents

Design Files

Engineering Services

2 engineering services

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