68HC912D60A|16-Bit Automotive Microcontroller | NXP Semiconductors

Automotive

Industrial

Consumer

Technologies

16-Bit Automotive Microcontroller

68HC912D60A Not Recommended for New Designs
  • This page contains information on a product that is not recommended for new designs.
The 68HC912D60A microcontroller unit (MCU) is a 16-bit device available in two package options, 80-pin QFP and 112-pin TQFP. On-chip peripherals include a 16-bit central processing unit (CPU12), 60K bytes of flash EEPROM, 2K bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communication interfaces (SCI), a serial peripheral interface (SPI), an enhanced capture timer (ECT), two (one on 80QFP) 8-channel, 10-bit analog-to-digital converters (ATD), a four-channel pulse-width modulator (PWM), and a CAN 2.0 A, B software compatible module (MSCAN12). System resource mapping, clock generation, interrupt control and bus interfacing are managed by the lite integration module (LIM). The 68HC912D60A has full 16-bit data paths throughout, however, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each module, 16 (2 on 80QFP) I/O port pins are available with Key-Wake-Up capability from STOP or WAIT mode.

Product Details

Block Diagram

Washer Machines Microcontrollers for M68HC05 Family Block Diagram

Washer Machines Microcontrollers for M68HC05 Family Block Diagram
Get diagram PDF

Features

  • 16-bit CPU12
  • Multiplexed bus
  • Two 8-bit ports with key wake-up interrupt (2 pins only are available on 80QFP) and one I 2 C start bit detector (112TQFP only)
  • 60K byte flash EEPROM, made of a 28K module and a 32K module with 8K bytes protected BOOT section in each module (68HC912D60)
  • 60K byte ROM (68HC12D60)
  • 1K byte EEPROM
  • 2K byte RAM
  • 1M bit per second, CAN 2.0 A, B software compatible module
  • Enhanced capture timer (ECT)
  • 4 PWM channels with programmable period and duty cycle

Buy/Parametrics

‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
‌
‌

‌
‌
‌
‌
‌
‌
N true 0 PSP68HC912D60Aen 37 Application Note Application Note t789 26 Data Sheet Data Sheet t520 1 Errata Errata t522 3 Product Change Notice Product Change Notice t526 1 Reference Manual Reference Manual t877 2 Technical Notes Technical Notes t521 4 en_US 0 false en_US en Data Sheet Data Sheet 1 1 3.1 English The MC68HC912D60A microcontroller unit (MCU) is a 16-bit device available in two package options, 80-pin QFP and 112-pin TQFP. On-chip peripherals include a 16-bit central processing unit (CPU12), 60K bytes of flash EEPROM, 2K bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communication interfaces (SCI), a serial peripheral interface (SPI), an enhanced capture timer (ECT), two (one on 80QFP) 8-channel... I995991690962 PSP 4.1 MB None None documents None I995991690962 /docs/en/data-sheet/MC68HC912D60A.pdf 4110338 /docs/en/data-sheet/MC68HC912D60A.pdf MC68HC912D60A documents N N 2001-07-24 MC68HC912D60C, MC68HC912D60P Technical Data - Data Sheet /docs/en/data-sheet/MC68HC912D60A.pdf /docs/en/data-sheet/MC68HC912D60A.pdf Data Sheet N 980000996212993340 2022-12-07 pdf N en Aug 18, 2005 980000996212993340 Data Sheet Y N MC68HC912D60C, MC68HC912D60P Technical Data - Data Sheet Reference Manual Reference Manual 2 2 4 English This manual describes the features and operation of the core (central processing unit, or CPU, and development support functions) used in all M68HC12 and HCS12 microcontrollers. The CPU12 is a high-speed, 16-bit processing unit that has a programming model identical to that of the industry standard M68HC11 central processor unit (CPU). The CPU12 instruction set is a proper superset of the M68HC11 instruction set. O966576741768 PSP 3.5 MB Registration without Disclaimer None documents Extended O966576741768 /secured/assets/documents/en/reference-manual/CPU12RM.pdf 3476085 /secured/assets/documents/en/reference-manual/CPU12RM.pdf CPU12RM documents Y N 2016-10-31 CPU12 - Reference Manual /webapp/Download?colCode=CPU12RM /secured/assets/documents/en/reference-manual/CPU12RM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Mar 30, 2006 500633505221135046 Reference Manual Y N CPU12 - Reference Manual 3 2 English CPU12 Reference Guide A966576739154 PSP 1.3 MB Registration without Disclaimer None documents Extended A966576739154 /secured/assets/documents/en/reference-manual/CPU12RG.pdf 1336997 /secured/assets/documents/en/reference-manual/CPU12RG.pdf CPU12RG documents Y N 2016-10-31 CPU12 Reference Guide /webapp/Download?colCode=CPU12RG /secured/assets/documents/en/reference-manual/CPU12RG.pdf Reference Manual N 500633505221135046 2023-06-18 pdf Y en Nov 26, 2001 500633505221135046 Reference Manual Y N CPU12 Reference Guide Application Note Application Note 26 4 1 Chinese R1029437274857zh PSP 1.8 MB None None documents None R1029437274857 /docs/zh/application-note/AN2321.pdf 1750349 /docs/zh/application-note/AN2321.pdf AN2321 documents N N 2016-10-31 Designing for Board Level Electromagnetic Compatibility /docs/zh/application-note/AN2321.pdf /docs/zh/application-note/AN2321.pdf Application Note N 645036621402383989 2022-12-07 zh 645036621402383989 Application Note N 电路板级的电磁兼容设计 1 English Designing for Board Level Electromagnetic Compatibility R1029437274857 PSP 1.8 MB None None documents None R1029437274857 /docs/en/application-note/AN2321.pdf 1750349 /docs/en/application-note/AN2321.pdf AN2321 documents N N 2016-10-31 Designing for Board Level Electromagnetic Compatibility /docs/en/application-note/AN2321.pdf /docs/en/application-note/AN2321.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 18, 2005 645036621402383989 Application Note Y N Designing for Board Level Electromagnetic Compatibility 5 4 English Discrete Products provide a complete solution for designing a low cost system for direct and accurate liquid level control using an ac powered pump or solenoid valve. This circuit approach which exclusively uses NXP semiconductor parts, incorporates a piezoresistive pressure sensor with on-chip temperature compensation and a new solid-state relay with an integrated power triac, to drive directly the liquid level control equipment from the domestic 110/220V 50/60 Hz ac main power line. N966580685759 PSP 285.7 KB None None documents None N966580685759 /docs/en/application-note/AN1516.pdf 285680 /docs/en/application-note/AN1516.pdf AN1516 documents N N 2016-10-31 AN1516 Liquid Level Control Using a Pressure Sensor /docs/en/application-note/AN1516.pdf /docs/en/application-note/AN1516.pdf Application Note N 645036621402383989 2022-12-07 pdf N en May 16, 2005 645036621402383989 Application Note Y N AN1516 Liquid Level Control Using a Pressure Sensor 6 0 English This application note will help users of analog-to-digital converters (ADC) understand common terminologies used in the electronics industry to define ADC operation and performance. There are many terms and parameters used to define the performance of ADCs. Included in this document are common definitions, numerical specifications, differences, and issues with the definitions. By understanding the terminology used to specify various ADC parameters. 10zHQHtb PSP 2.4 MB None None documents None 10zHQHtb /docs/en/application-note/AN2438.pdf 2415284 /docs/en/application-note/AN2438.pdf AN2438 documents N 2003-03-13 ADC Definitions and Specifications /docs/en/application-note/AN2438.pdf /docs/en/application-note/AN2438.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 21, 2003 645036621402383989 Application Note Y N ADC Definitions and Specifications 7 0 English This application note shows some circuits that can used to optically isolate input, output and bi-directional digital pins. Debug interfaces for the Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08 are also shown. L1032965782249 PSP 1.0 MB None None documents None L1032965782249 /docs/en/application-note/AN2342.pdf 1012457 /docs/en/application-note/AN2342.pdf AN2342 documents N 2002-09-25 Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers /docs/en/application-note/AN2342.pdf /docs/en/application-note/AN2342.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 25, 2002 645036621402383989 Application Note Y N Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers 8 0 English This application note is intended to help the user understand the MSCAN interrupts on HC08 and HC12 devices; however, does not apply to the HCS12. L1029956619079 PSP 785.5 KB None None documents None L1029956619079 /docs/en/application-note/AN2283.pdf 785538 /docs/en/application-note/AN2283.pdf AN2283 documents N 2002-08-21 Scalable Controller Area Network (MSCAN) Interrupts /docs/en/application-note/AN2283.pdf /docs/en/application-note/AN2283.pdf Application Note N 645036621402383989 2022-12-07 pdf en Aug 21, 2002 645036621402383989 Application Note Y N Scalable Controller Area Network (MSCAN) Interrupts 9 1 English This document describes how to use the CAN to examine, modify or reprogram the memory contents of any MCU connected to the network from a single, easily accessible point within the system. Although a working example is shown for Our HC12 Flash memory, the principles discussed could be easily extended to any other Flash technology. S1013599410452 PSP 606.0 KB None None documents None S1013599410452 /docs/en/application-note/AN1828.pdf 606021 /docs/en/application-note/AN1828.pdf AN1828 documents N 2002-02-13 FLASH Programming Via CAN /docs/en/application-note/AN1828.pdf /docs/en/application-note/AN1828.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 13, 2002 645036621402383989 Application Note Y N FLASH Programming Via CAN 10 0 English The purpose of this paper is to describe the co-ordinated actions necessary to put a CAN application into a low power sleep mode such that it will wake-up in response to a specified stimulus. The description in this paper is based on the MC9S12D family of microcontrollers, however it also applies to the MC68HC08 and MC68HC12 microcontrollers that have an MSCAN module, albeit with slightly different register and register bit names. Q1013514667038 PSP 403.1 KB None None documents None Q1013514667038 /docs/en/application-note/AN2255.pdf 403136 /docs/en/application-note/AN2255.pdf AN2255 documents N 2002-02-12 MSCAN Low-Power Applications /docs/en/application-note/AN2255.pdf /docs/en/application-note/AN2255.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 11, 2002 645036621402383989 Application Note Y N MSCAN Low-Power Applications 11 0 English This document offers an alternative approach to monitor the start-up performance of the oscillator within an application. L1010004077145 PSP 430.5 KB None None documents None L1010004077145 /docs/en/application-note/AN2219.pdf 430526 /docs/en/application-note/AN2219.pdf AN2219 documents N 2002-01-02 Using PLL to indicate Oscillator Start-Up Performance during Power On Reset /docs/en/application-note/AN2219.pdf /docs/en/application-note/AN2219.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 21, 2001 645036621402383989 Application Note Y N Using PLL to indicate Oscillator Start-Up Performance during Power On Reset 12 0 English This application note describes compatibility considerations that should be followed when converting code from the 0.65u ROM M68HC12D60 for use on the 0.5u Flash M68HC912D60A. A1004605807920 PSP 556.0 KB None None documents None A1004605807920 /docs/en/application-note/AN2188.pdf 556021 /docs/en/application-note/AN2188.pdf AN2188 documents N 2001-11-01 Compatibility considerations between the 0.65u ROM M68HC12D60 and the 0.5u Flash M68HC912D60A /docs/en/application-note/AN2188.pdf /docs/en/application-note/AN2188.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 1, 2001 645036621402383989 Application Note Y N Compatibility considerations between the 0.65u ROM M68HC12D60 and the 0.5u Flash M68HC912D60A 13 0 English The purpose of this document is to present the most commonly used configurations of the clock control registers and to outline the behaviour of the clock generation circuit in low power modes and under adverse conditions. This document should be used in conjunction with the relevant microcontroller Technical Manual. Q1001663442692 PSP 312.3 KB None None documents None Q1001663442692 /docs/en/application-note/AN2189.pdf 312289 /docs/en/application-note/AN2189.pdf AN2189 documents N 2001-09-28 Using the Clock Generation Module on the HC12 D Family /docs/en/application-note/AN2189.pdf /docs/en/application-note/AN2189.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 27, 2001 645036621402383989 Application Note Y N Using the Clock Generation Module on the HC12 D Family 14 0 English AN2166SW.zip /secured/assets/documents/en/application-note-software/AN2166SW.zip /webapp/Download?colCode=AN2166SW&appType=license&docLang=en This application note explains how to use the FLASH and EEPROM on the MC68HC912DT128A/DG128A and provides example software for program and erase operations. These algorithms are written in MC68HC12 assembly code. A997374332422 PSP 3.0 MB None None documents None A997374332422 /docs/en/application-note/AN2166.pdf 2980302 /docs/en/application-note/AN2166.pdf AN2166 documents N 2001-08-09 Programming and Erasing FLASH and EEPROM Memories on the MC68HC912DT128A/DG128A/D60A /docs/en/application-note/AN2166.pdf /docs/en/application-note/AN2166.pdf Application Note N 645036621402383989 2022-12-07 pdf en Aug 9, 2001 645036621402383989 Application Note Y N Programming and Erasing FLASH and EEPROM Memories on the MC68HC912DT128A/DG128A/D60A 15 4 English This application note describes CAN bit timing requirements for performance optimisation. G991670758526 PSP 427.4 KB None None documents None G991670758526 /docs/en/application-note/AN1798.pdf 427392 /docs/en/application-note/AN1798.pdf AN1798 documents N 2001-06-04 CAN bit timing requirements /docs/en/application-note/AN1798.pdf /docs/en/application-note/AN1798.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jun 1, 2001 645036621402383989 Application Note Y N CAN bit timing requirements 16 0 English This application note describes the basic operation of the background debug mode (BDM) and some of its applications, as it relates to Our M68HC12 Family of microcontrollers (MCU). Examples of in-circuit programming of internal FLASH memory and in-circuit debugging, using P&E Microcomputer Systems' BDM interface cable and its software, are also contained in this document. X989427477997 PSP 615.8 KB None None documents None X989427477997 /docs/en/application-note/AN2104.pdf 615791 /docs/en/application-note/AN2104.pdf AN2104 documents N 2001-05-09 Using Background Debug Mode for the M68HC12 Family /docs/en/application-note/AN2104.pdf /docs/en/application-note/AN2104.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 2, 2001 645036621402383989 Application Note Y N Using Background Debug Mode for the M68HC12 Family 17 0 English This application note describes a LIN demo that was designed for the SAE show in March 2000. The project was intended to demonstrate the LIN protocol, tools, and NXP products that were available. Although the demo is purely visual and does not represent any particular application, it does introduce many features that would be implemented in actual applications. C978120734892 PSP 1.7 MB None None documents None C978120734892 /docs/en/application-note/AN2103.pdf 1676151 /docs/en/application-note/AN2103.pdf AN2103 documents N N 2016-10-31 Local Interconnect Network (LIN) Demonstration /docs/en/application-note/AN2103.pdf /docs/en/application-note/AN2103.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Dec 1, 2000 645036621402383989 Application Note Y N Local Interconnect Network (LIN) Demonstration 18 0 English This application note describes the three major FLASH EEPROM technologies currently found in the M68HC12, M68HC08, M68HC3xx, and MPC microcontrollers. An explanation of the key characteristics of these memories is provided and the features that enable certain characteristics such as high density and low-power operation. Nonvolatile memory also presents a broad array of new terms to describe EPROM or byte erasable EEPROM memories. P967833968545 PSP 1.2 MB None None documents None P967833968545 /docs/en/application-note/AN1837.pdf 1214970 /docs/en/application-note/AN1837.pdf AN1837 documents N 2000-09-01 Non-Volatile Memory Technology Overview /docs/en/application-note/AN1837.pdf /docs/en/application-note/AN1837.pdf Application Note N 645036621402383989 2022-12-07 pdf en Mar 27, 2000 645036621402383989 Application Note Y N Non-Volatile Memory Technology Overview 19 0 English The operating speed of present HCMOS devices is approaching that of the fastest bipolar logic families of only a few years ago. Associated with this increase in performance are some new design challenges for the MCU-based system designer. Y967833878334 PSP 456.1 KB None None documents None Y967833878334 /docs/en/application-note/AN1050.pdf 456108 /docs/en/application-note/AN1050.pdf AN1050 documents N N 2016-10-31 Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers /docs/en/application-note/AN1050.pdf /docs/en/application-note/AN1050.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 2000 645036621402383989 Application Note Y N Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers 20 1 English Many microcontrollers (MCUs) incorporate an inverting amplifier for use with an external crystal or ceramic resonator in a Pierce oscillator configuration. This paper describes how to calculate the minimum gain (transconductance) of the amplifier required to ensure oscillation with specific external components, and also how to measure the amplifier transconductance to establish whether the minimum gain requirement is met. O967833941140 PSP 362.3 KB None None documents None O967833941140 /docs/en/application-note/AN1783.pdf 362263 /docs/en/application-note/AN1783.pdf AN1783 documents N N 2016-10-31 Determining MCU Oscillator Start-Up Parameters /docs/en/application-note/AN1783.pdf /docs/en/application-note/AN1783.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1999 645036621402383989 Application Note Y N Determining MCU Oscillator Start-Up Parameters 21 0 English This application note focuses on reduction techniques for electromagnetic interference. I966577944756 PSP 439.7 KB None None documents None I966577944756 /docs/en/application-note/AN1705.pdf 439712 /docs/en/application-note/AN1705.pdf AN1705 documents N N 2016-10-31 Noise Reduction Techniques for Microcontroller-Based Systems /docs/en/application-note/AN1705.pdf /docs/en/application-note/AN1705.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1999 645036621402383989 Application Note Y N Noise Reduction Techniques for Microcontroller-Based Systems 22 0 English This application note presents basic tone synthesis techniques and illustrates their implementation using the HC08, HC05, HC11, and HC12 Families of MCUs. S967833928924 PSP 857.7 KB None None documents None S967833928924 /docs/en/application-note/AN1771.pdf 857671 /docs/en/application-note/AN1771.pdf AN1771 documents N N 2016-10-31 Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs /docs/en/application-note/AN1771.pdf /docs/en/application-note/AN1771.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1998 645036621402383989 Application Note Y N Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs 23 1 English This application note documents a method of extending digital input using the analog-to-digital converter of an MCU. S967833934540 PSP 459.0 KB None None documents None S967833934540 /docs/en/application-note/AN1775.pdf 458988 /docs/en/application-note/AN1775.pdf AN1775 documents N N 2016-10-31 Expanding Digital Input with an A/D Converter /docs/en/application-note/AN1775.pdf /docs/en/application-note/AN1775.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1998 645036621402383989 Application Note Y N Expanding Digital Input with an A/D Converter 24 1 English Indexed indirect addressing (IIA) is an addressing mode infrequently found in CPU instruction sets. The IAA mode adds an additional level of indirection beyond standard indexed addressing modes. This application note presents some techniques for making the IIA mode more useful. The efficient instruction set and the addressing mode features of the M68HC12 allow it to compete effectively with RISC processors. D966576629437 PSP 386.6 KB None None documents None D966576629437 /docs/en/application-note/AN1716.pdf 386641 /docs/en/application-note/AN1716.pdf AN1716 documents N 2000-08-17 Using M68HC12 Indexed Indirect Addressing /docs/en/application-note/AN1716.pdf /docs/en/application-note/AN1716.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note Y N Using M68HC12 Indexed Indirect Addressing 25 0 English This application note provides the details necessary to utilize the D-Bug12 user-callable utility functions. Additionally, it shows how to substitute user interrupt service routines for D-Bug12's default exception handlers. A966576626834 PSP 1.1 MB None None documents None A966576626834 /docs/en/application-note/AN1280A.pdf 1137321 /docs/en/application-note/AN1280A.pdf AN1280A documents N 2000-08-17 Using the Callable Routines in D-Bug12 /docs/en/application-note/AN1280A.pdf /docs/en/application-note/AN1280A.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note Y N Using the Callable Routines in D-Bug12 26 0 English In general, the CPU12 is a proper superset of the M68HC11 CPU. Significant changes have been made to improve the efficiency and capabilities of the CPU without sacrificing compatibility with the popular M68HC11 family. This note provides information that will allow the large number of programmers familiar with the M68HC11 to evaluate moving from an M68HC11 system to an M68HC12 system. V967156618397 PSP 1.7 MB None None documents None V967156618397 /docs/en/application-note/AN1284.pdf 1686279 /docs/en/application-note/AN1284.pdf AN1284 documents N 2000-08-24 Transporting M68HC11 Code to M68HC12 Devices /docs/en/application-note/AN1284.pdf /docs/en/application-note/AN1284.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1996 645036621402383989 Application Note N N Transporting M68HC11 Code to M68HC12 Devices 27 0 English Using and Extending D-Bug12 Routines A966576624312 PSP 613.3 KB None None documents None A966576624312 /docs/en/application-note/AN1280.pdf 613317 /docs/en/application-note/AN1280.pdf AN1280 documents N 2000-08-17 Using and Extending D-Bug12 Routines /docs/en/application-note/AN1280.pdf /docs/en/application-note/AN1280.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1996 645036621402383989 Application Note N N Using and Extending D-Bug12 Routines 28 0 English This application note discusses how to design a single-chip microcontroller application considering electromagnetic compatibility (EMC). O967833897694 PSP 283.9 KB None None documents None O967833897694 /docs/en/application-note/AN1263.pdf 283939 /docs/en/application-note/AN1263.pdf AN1263 documents N N 2016-10-31 Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers /docs/en/application-note/AN1263.pdf /docs/en/application-note/AN1263.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1995 645036621402383989 Application Note Y N Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers 29 0 English Focusing on utilizing proven layout techniques to control EMI on MCU-based mixed-signal systems. It provides a practical approach rather than a theoretical discussion. F967833892719 PSP 347.8 KB None None documents None F967833892719 /docs/en/application-note/AN1259.pdf 347790 /docs/en/application-note/AN1259.pdf AN1259 documents N N 2016-10-31 AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note /docs/en/application-note/AN1259.pdf /docs/en/application-note/AN1259.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1995 645036621402383989 Application Note Y N AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note Technical Notes Technical Notes 4 30 6 English As a result of an investigation into issues reported by customers and analysis of related application modules, NXP has found that some units behave in a manner that may lead to these issues when the microcontroller is operated outside of its specification. This document describes this behavior and tells customers how to avoid the conditions that give rise to the issue. 1154978663218714732415 PSP 162.7 KB None None documents None 1154978663218714732415 /docs/en/engineering-bulletin/EB664.pdf 162720 /docs/en/engineering-bulletin/EB664.pdf EB664 documents N 2006-08-07 HC912D60A - HC912Dx128A 0.5 Microcontrollers /docs/en/engineering-bulletin/EB664.pdf /docs/en/engineering-bulletin/EB664.pdf Technical Notes N 389245547230346745 2022-12-07 pdf en Aug 7, 2006 389245547230346745 Technical Notes N N HC912D60A - HC912Dx128A 0.5 Microcontrollers 31 0 English This document is intended for the users who would like to make better use of the PLL lock/unlock feature in their system. 1102097832501698152143 PSP 61.4 KB None None documents None 1102097832501698152143 /docs/en/engineering-bulletin/EB640.pdf 61361 /docs/en/engineering-bulletin/EB640.pdf EB640 documents N 2004-12-03 EB640: PLL Lock Detection on the HC12 D-Family /docs/en/engineering-bulletin/EB640.pdf /docs/en/engineering-bulletin/EB640.pdf Technical Notes N 389245547230346745 2022-12-07 pdf en Dec 3, 2004 389245547230346745 Technical Notes N N EB640: PLL Lock Detection on the HC12 D-Family 32 0 English The HC12's enhanced capture timer (ECT) module is an updated version of the original Motorola HC11 Family timer. 1057853578534717323482 PSP 264.1 KB None None documents None 1057853578534717323482 /docs/en/engineering-bulletin/EB611.pdf 264134 /docs/en/engineering-bulletin/EB611.pdf EB611 documents N 2003-07-10 EB611/D: HC11 and HC12 Families' Pulse Accumulator /docs/en/engineering-bulletin/EB611.pdf /docs/en/engineering-bulletin/EB611.pdf Technical Notes N 389245547230346745 2022-12-07 pdf en Jul 10, 2003 389245547230346745 Technical Notes N N EB611/D: HC11 and HC12 Families' Pulse Accumulator 33 0 English Engineering Bulletin C1024523882098 PSP 239.6 KB None None documents None C1024523882098 /docs/en/engineering-bulletin/EB396.pdf 239585 /docs/en/engineering-bulletin/EB396.pdf EB396 documents N N 2016-10-31 Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers /docs/en/engineering-bulletin/EB396.pdf /docs/en/engineering-bulletin/EB396.pdf Technical Notes N 389245547230346745 2022-12-07 pdf N en Jun 19, 2002 389245547230346745 Technical Notes Y N Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers Errata Errata 3 34 0 English Mask Set Errata for
68HC912D60A, Mask 0M35Z 1314823870750719185527 PSP 177.7 KB None None documents None 1314823870750719185527 /docs/en/errata/MSE912D60A_0M35Z.pdf 177655 /docs/en/errata/MSE912D60A_0M35Z.pdf MSE912D60A_0M35Z documents N N 2011-08-31 Mask Set Errata for 68HC912D60A, Mask 0M35Z /docs/en/errata/MSE912D60A_0M35Z.pdf /docs/en/errata/MSE912D60A_0M35Z.pdf Errata N 155452329886410597 2022-12-07 pdf N en Aug 31, 2011 155452329886410597 Errata Y N Mask Set Errata for 68HC912D60A, Mask 0M35Z 35 0 English This errata provides information applicable to the following MCU mask set devices: 1L02H masks of the MC68HC912D60A. 113LDHv0 PSP 77.3 KB None None documents None 113LDHv0 /docs/en/errata/MSE912D60A_1L02H.pdf 77330 /docs/en/errata/MSE912D60A_1L02H.pdf MSE912D60A_1L02H documents N 2003-03-31 68HC912D60A Mask Set Errata: 1L02H - Errata /docs/en/errata/MSE912D60A_1L02H.pdf /docs/en/errata/MSE912D60A_1L02H.pdf Errata N 155452329886410597 2022-12-07 pdf en Mar 31, 2003 155452329886410597 Errata Y N 68HC912D60A Mask Set Errata: 1L02H - Errata 36 0 English This errata provides information applicable to the following MCU mask set devices: 2K38K masks of the MC68HC912D60A. 113LDNLX PSP 180.9 KB None None documents None 113LDNLX /docs/en/errata/MSE912D60A_2K38K.pdf 180903 /docs/en/errata/MSE912D60A_2K38K.pdf MSE912D60A_2K38K documents N 2003-03-31 68HC912D60A Mask Set Errata: 2K38K - Errata /docs/en/errata/MSE912D60A_2K38K.pdf /docs/en/errata/MSE912D60A_2K38K.pdf Errata N 155452329886410597 2022-12-07 pdf en Mar 31, 2003 155452329886410597 Errata Y N 68HC912D60A Mask Set Errata: 2K38K - Errata Product Change Notice Product Change Notice 1 37 0 English 1400655187257698150893 PSP 311.5 KB None None documents None 1400655187257698150893 /docs/en/product-change-notice/PCN16235.htm 311474 /docs/en/product-change-notice/PCN16235.htm PCN16235 documents N 2014-05-20 Copper Wire Conversion for Microcontroller and Microprocessor Devices /docs/en/product-change-notice/PCN16235.htm /docs/en/product-change-notice/PCN16235.htm Product Change Notice N 454076741825495278 2022-12-07 htm en May 20, 2014 454076741825495278 Product Change Notice D N Copper Wire Conversion for Microcontroller and Microprocessor Devices false 0 68HC912D60A downloads en true 1 Y PSP Application Note 26 /docs/en/application-note/AN2321.pdf 2016-10-31 R1029437274857 PSP 4 Oct 18, 2005 Application Note Designing for Board Level Electromagnetic Compatibility None /docs/en/application-note/AN2321.pdf English documents 1750349 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2321.pdf Designing for Board Level Electromagnetic Compatibility /docs/en/application-note/AN2321.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Designing for Board Level Electromagnetic Compatibility 1.8 MB AN2321 N R1029437274857 /docs/en/application-note/AN1516.pdf 2016-10-31 N966580685759 PSP 5 May 16, 2005 Application Note Discrete Products provide a complete solution for designing a low cost system for direct and accurate liquid level control using an ac powered pump or solenoid valve. This circuit approach which exclusively uses NXP semiconductor parts, incorporates a piezoresistive pressure sensor with on-chip temperature compensation and a new solid-state relay with an integrated power triac, to drive directly the liquid level control equipment from the domestic 110/220V 50/60 Hz ac main power line. None /docs/en/application-note/AN1516.pdf English documents 285680 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1516.pdf AN1516 Liquid Level Control Using a Pressure Sensor /docs/en/application-note/AN1516.pdf documents 645036621402383989 Application Note N en None Y pdf 4 N N AN1516 Liquid Level Control Using a Pressure Sensor 285.7 KB AN1516 N N966580685759 /docs/en/application-note/AN2438.pdf 2003-03-13 10zHQHtb PSP 6 Feb 21, 2003 Application Note This application note will help users of analog-to-digital converters (ADC) understand common terminologies used in the electronics industry to define ADC operation and performance. There are many terms and parameters used to define the performance of ADCs. Included in this document are common definitions, numerical specifications, differences, and issues with the definitions. By understanding the terminology used to specify various ADC parameters. None /docs/en/application-note/AN2438.pdf English documents 2415284 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2438.pdf ADC Definitions and Specifications /docs/en/application-note/AN2438.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N ADC Definitions and Specifications 2.4 MB AN2438 N 10zHQHtb /docs/en/application-note/AN2342.pdf 2002-09-25 L1032965782249 PSP 7 Sep 25, 2002 Application Note This application note shows some circuits that can used to optically isolate input, output and bi-directional digital pins. Debug interfaces for the Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08 are also shown. None /docs/en/application-note/AN2342.pdf English documents 1012457 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2342.pdf Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers /docs/en/application-note/AN2342.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers 1.0 MB AN2342 N L1032965782249 /docs/en/application-note/AN2283.pdf 2002-08-21 L1029956619079 PSP 8 Aug 21, 2002 Application Note This application note is intended to help the user understand the MSCAN interrupts on HC08 and HC12 devices; however, does not apply to the HCS12. None /docs/en/application-note/AN2283.pdf English documents 785538 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2283.pdf Scalable Controller Area Network (MSCAN) Interrupts /docs/en/application-note/AN2283.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Scalable Controller Area Network (MSCAN) Interrupts 785.5 KB AN2283 N L1029956619079 /docs/en/application-note/AN1828.pdf 2002-02-13 S1013599410452 PSP 9 Feb 13, 2002 Application Note This document describes how to use the CAN to examine, modify or reprogram the memory contents of any MCU connected to the network from a single, easily accessible point within the system. Although a working example is shown for Our HC12 Flash memory, the principles discussed could be easily extended to any other Flash technology. None /docs/en/application-note/AN1828.pdf English documents 606021 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1828.pdf FLASH Programming Via CAN /docs/en/application-note/AN1828.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N FLASH Programming Via CAN 606.0 KB AN1828 N S1013599410452 /docs/en/application-note/AN2255.pdf 2002-02-12 Q1013514667038 PSP 10 Feb 11, 2002 Application Note The purpose of this paper is to describe the co-ordinated actions necessary to put a CAN application into a low power sleep mode such that it will wake-up in response to a specified stimulus. The description in this paper is based on the MC9S12D family of microcontrollers, however it also applies to the MC68HC08 and MC68HC12 microcontrollers that have an MSCAN module, albeit with slightly different register and register bit names. None /docs/en/application-note/AN2255.pdf English documents 403136 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2255.pdf MSCAN Low-Power Applications /docs/en/application-note/AN2255.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N MSCAN Low-Power Applications 403.1 KB AN2255 N Q1013514667038 /docs/en/application-note/AN2219.pdf 2002-01-02 L1010004077145 PSP 11 Dec 21, 2001 Application Note This document offers an alternative approach to monitor the start-up performance of the oscillator within an application. None /docs/en/application-note/AN2219.pdf English documents 430526 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2219.pdf Using PLL to indicate Oscillator Start-Up Performance during Power On Reset /docs/en/application-note/AN2219.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using PLL to indicate Oscillator Start-Up Performance during Power On Reset 430.5 KB AN2219 N L1010004077145 /docs/en/application-note/AN2188.pdf 2001-11-01 A1004605807920 PSP 12 Nov 1, 2001 Application Note This application note describes compatibility considerations that should be followed when converting code from the 0.65u ROM M68HC12D60 for use on the 0.5u Flash M68HC912D60A. None /docs/en/application-note/AN2188.pdf English documents 556021 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2188.pdf Compatibility considerations between the 0.65u ROM M68HC12D60 and the 0.5u Flash M68HC912D60A /docs/en/application-note/AN2188.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Compatibility considerations between the 0.65u ROM M68HC12D60 and the 0.5u Flash M68HC912D60A 556.0 KB AN2188 N A1004605807920 /docs/en/application-note/AN2189.pdf 2001-09-28 Q1001663442692 PSP 13 Sep 27, 2001 Application Note The purpose of this document is to present the most commonly used configurations of the clock control registers and to outline the behaviour of the clock generation circuit in low power modes and under adverse conditions. This document should be used in conjunction with the relevant microcontroller Technical Manual. None /docs/en/application-note/AN2189.pdf English documents 312289 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2189.pdf Using the Clock Generation Module on the HC12 D Family /docs/en/application-note/AN2189.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the Clock Generation Module on the HC12 D Family 312.3 KB AN2189 N Q1001663442692 /docs/en/application-note/AN2166.pdf 2001-08-09 A997374332422 PSP 14 Aug 9, 2001 Application Note This application note explains how to use the FLASH and EEPROM on the MC68HC912DT128A/DG128A and provides example software for program and erase operations. These algorithms are written in MC68HC12 assembly code. None /docs/en/application-note/AN2166.pdf English documents 2980302 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2166.pdf Programming and Erasing FLASH and EEPROM Memories on the MC68HC912DT128A/DG128A/D60A /docs/en/application-note/AN2166.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Programming and Erasing FLASH and EEPROM Memories on the MC68HC912DT128A/DG128A/D60A 3.0 MB AN2166 N A997374332422 /docs/en/application-note/AN1798.pdf 2001-06-04 G991670758526 PSP 15 Jun 1, 2001 Application Note This application note describes CAN bit timing requirements for performance optimisation. None /docs/en/application-note/AN1798.pdf English documents 427392 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1798.pdf CAN bit timing requirements /docs/en/application-note/AN1798.pdf documents 645036621402383989 Application Note N en None Y pdf 4 N CAN bit timing requirements 427.4 KB AN1798 N G991670758526 /docs/en/application-note/AN2104.pdf 2001-05-09 X989427477997 PSP 16 Feb 2, 2001 Application Note This application note describes the basic operation of the background debug mode (BDM) and some of its applications, as it relates to Our M68HC12 Family of microcontrollers (MCU). Examples of in-circuit programming of internal FLASH memory and in-circuit debugging, using P&E Microcomputer Systems' BDM interface cable and its software, are also contained in this document. None /docs/en/application-note/AN2104.pdf English documents 615791 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2104.pdf Using Background Debug Mode for the M68HC12 Family /docs/en/application-note/AN2104.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using Background Debug Mode for the M68HC12 Family 615.8 KB AN2104 N X989427477997 /docs/en/application-note/AN2103.pdf 2016-10-31 C978120734892 PSP 17 Dec 1, 2000 Application Note This application note describes a LIN demo that was designed for the SAE show in March 2000. The project was intended to demonstrate the LIN protocol, tools, and NXP products that were available. Although the demo is purely visual and does not represent any particular application, it does introduce many features that would be implemented in actual applications. None /docs/en/application-note/AN2103.pdf English documents 1676151 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2103.pdf Local Interconnect Network (LIN) Demonstration /docs/en/application-note/AN2103.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Local Interconnect Network (LIN) Demonstration 1.7 MB AN2103 N C978120734892 /docs/en/application-note/AN1837.pdf 2000-09-01 P967833968545 PSP 18 Mar 27, 2000 Application Note This application note describes the three major FLASH EEPROM technologies currently found in the M68HC12, M68HC08, M68HC3xx, and MPC microcontrollers. An explanation of the key characteristics of these memories is provided and the features that enable certain characteristics such as high density and low-power operation. Nonvolatile memory also presents a broad array of new terms to describe EPROM or byte erasable EEPROM memories. None /docs/en/application-note/AN1837.pdf English documents 1214970 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1837.pdf Non-Volatile Memory Technology Overview /docs/en/application-note/AN1837.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Non-Volatile Memory Technology Overview 1.2 MB AN1837 N P967833968545 /docs/en/application-note/AN1050.pdf 2016-10-31 Y967833878334 PSP 19 Jan 1, 2000 Application Note The operating speed of present HCMOS devices is approaching that of the fastest bipolar logic families of only a few years ago. Associated with this increase in performance are some new design challenges for the MCU-based system designer. None /docs/en/application-note/AN1050.pdf English documents 456108 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1050.pdf Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers /docs/en/application-note/AN1050.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers 456.1 KB AN1050 N Y967833878334 /docs/en/application-note/AN1783.pdf 2016-10-31 O967833941140 PSP 20 Jan 1, 1999 Application Note Many microcontrollers (MCUs) incorporate an inverting amplifier for use with an external crystal or ceramic resonator in a Pierce oscillator configuration. This paper describes how to calculate the minimum gain (transconductance) of the amplifier required to ensure oscillation with specific external components, and also how to measure the amplifier transconductance to establish whether the minimum gain requirement is met. None /docs/en/application-note/AN1783.pdf English documents 362263 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1783.pdf Determining MCU Oscillator Start-Up Parameters /docs/en/application-note/AN1783.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Determining MCU Oscillator Start-Up Parameters 362.3 KB AN1783 N O967833941140 /docs/en/application-note/AN1705.pdf 2016-10-31 I966577944756 PSP 21 Jan 1, 1999 Application Note This application note focuses on reduction techniques for electromagnetic interference. None /docs/en/application-note/AN1705.pdf English documents 439712 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1705.pdf Noise Reduction Techniques for Microcontroller-Based Systems /docs/en/application-note/AN1705.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Noise Reduction Techniques for Microcontroller-Based Systems 439.7 KB AN1705 N I966577944756 /docs/en/application-note/AN1771.pdf 2016-10-31 S967833928924 PSP 22 Jan 1, 1998 Application Note This application note presents basic tone synthesis techniques and illustrates their implementation using the HC08, HC05, HC11, and HC12 Families of MCUs. None /docs/en/application-note/AN1771.pdf English documents 857671 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1771.pdf Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs /docs/en/application-note/AN1771.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs 857.7 KB AN1771 N S967833928924 /docs/en/application-note/AN1775.pdf 2016-10-31 S967833934540 PSP 23 Jan 1, 1998 Application Note This application note documents a method of extending digital input using the analog-to-digital converter of an MCU. None /docs/en/application-note/AN1775.pdf English documents 458988 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1775.pdf Expanding Digital Input with an A/D Converter /docs/en/application-note/AN1775.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Expanding Digital Input with an A/D Converter 459.0 KB AN1775 N S967833934540 /docs/en/application-note/AN1716.pdf 2000-08-17 D966576629437 PSP 24 Jan 1, 1997 Application Note Indexed indirect addressing (IIA) is an addressing mode infrequently found in CPU instruction sets. The IAA mode adds an additional level of indirection beyond standard indexed addressing modes. This application note presents some techniques for making the IIA mode more useful. The efficient instruction set and the addressing mode features of the M68HC12 allow it to compete effectively with RISC processors. None /docs/en/application-note/AN1716.pdf English documents 386641 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1716.pdf Using M68HC12 Indexed Indirect Addressing /docs/en/application-note/AN1716.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Using M68HC12 Indexed Indirect Addressing 386.6 KB AN1716 N D966576629437 /docs/en/application-note/AN1280A.pdf 2000-08-17 A966576626834 PSP 25 Jan 1, 1997 Application Note This application note provides the details necessary to utilize the D-Bug12 user-callable utility functions. Additionally, it shows how to substitute user interrupt service routines for D-Bug12's default exception handlers. None /docs/en/application-note/AN1280A.pdf English documents 1137321 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1280A.pdf Using the Callable Routines in D-Bug12 /docs/en/application-note/AN1280A.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the Callable Routines in D-Bug12 1.1 MB AN1280A N A966576626834 /docs/en/application-note/AN1284.pdf 2000-08-24 V967156618397 PSP 26 Jan 1, 1996 Application Note In general, the CPU12 is a proper superset of the M68HC11 CPU. Significant changes have been made to improve the efficiency and capabilities of the CPU without sacrificing compatibility with the popular M68HC11 family. This note provides information that will allow the large number of programmers familiar with the M68HC11 to evaluate moving from an M68HC11 system to an M68HC12 system. None /docs/en/application-note/AN1284.pdf English documents 1686279 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1284.pdf Transporting M68HC11 Code to M68HC12 Devices /docs/en/application-note/AN1284.pdf documents 645036621402383989 Application Note N en None N pdf 0 N Transporting M68HC11 Code to M68HC12 Devices 1.7 MB AN1284 N V967156618397 /docs/en/application-note/AN1280.pdf 2000-08-17 A966576624312 PSP 27 Jan 1, 1996 Application Note Using and Extending D-Bug12 Routines None /docs/en/application-note/AN1280.pdf English documents 613317 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1280.pdf Using and Extending D-Bug12 Routines /docs/en/application-note/AN1280.pdf documents 645036621402383989 Application Note N en None N pdf 0 N Using and Extending D-Bug12 Routines 613.3 KB AN1280 N A966576624312 /docs/en/application-note/AN1263.pdf 2016-10-31 O967833897694 PSP 28 Jan 1, 1995 Application Note This application note discusses how to design a single-chip microcontroller application considering electromagnetic compatibility (EMC). None /docs/en/application-note/AN1263.pdf English documents 283939 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1263.pdf Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers /docs/en/application-note/AN1263.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers 283.9 KB AN1263 N O967833897694 /docs/en/application-note/AN1259.pdf 2016-10-31 F967833892719 PSP 29 Jan 1, 1995 Application Note Focusing on utilizing proven layout techniques to control EMI on MCU-based mixed-signal systems. It provides a practical approach rather than a theoretical discussion. None /docs/en/application-note/AN1259.pdf English documents 347790 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1259.pdf AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note /docs/en/application-note/AN1259.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note 347.8 KB AN1259 N F967833892719 Data Sheet 1 /docs/en/data-sheet/MC68HC912D60A.pdf 2001-07-24 I995991690962 PSP 1 Aug 18, 2005 Data Sheet The MC68HC912D60A microcontroller unit (MCU) is a 16-bit device available in two package options, 80-pin QFP and 112-pin TQFP. On-chip peripherals include a 16-bit central processing unit (CPU12), 60K bytes of flash EEPROM, 2K bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communication interfaces (SCI), a serial peripheral interface (SPI), an enhanced capture timer (ECT), two (one on 80QFP) 8-channel... None /docs/en/data-sheet/MC68HC912D60A.pdf English documents 4110338 None 980000996212993340 2022-12-07 N /docs/en/data-sheet/MC68HC912D60A.pdf MC68HC912D60C, MC68HC912D60P Technical Data - Data Sheet /docs/en/data-sheet/MC68HC912D60A.pdf documents 980000996212993340 Data Sheet N en None Y pdf 3.1 N N MC68HC912D60C, MC68HC912D60P Technical Data - Data Sheet 4.1 MB MC68HC912D60A N I995991690962 Errata 3 /docs/en/errata/MSE912D60A_0M35Z.pdf 2011-08-31 1314823870750719185527 PSP 34 Aug 31, 2011 Errata Mask Set Errata for
68HC912D60A, Mask 0M35Z None /docs/en/errata/MSE912D60A_0M35Z.pdf English documents 177655 None 155452329886410597 2022-12-07 N /docs/en/errata/MSE912D60A_0M35Z.pdf Mask Set Errata for 68HC912D60A, Mask 0M35Z /docs/en/errata/MSE912D60A_0M35Z.pdf documents 155452329886410597 Errata N en None Y pdf 0 N N Mask Set Errata for 68HC912D60A, Mask 0M35Z 177.7 KB MSE912D60A_0M35Z N 1314823870750719185527 /docs/en/errata/MSE912D60A_1L02H.pdf 2003-03-31 113LDHv0 PSP 35 Mar 31, 2003 Errata This errata provides information applicable to the following MCU mask set devices: 1L02H masks of the MC68HC912D60A. None /docs/en/errata/MSE912D60A_1L02H.pdf English documents 77330 None 155452329886410597 2022-12-07 /docs/en/errata/MSE912D60A_1L02H.pdf 68HC912D60A Mask Set Errata: 1L02H - Errata /docs/en/errata/MSE912D60A_1L02H.pdf documents 155452329886410597 Errata N en None Y pdf 0 N 68HC912D60A Mask Set Errata: 1L02H - Errata 77.3 KB MSE912D60A_1L02H N 113LDHv0 /docs/en/errata/MSE912D60A_2K38K.pdf 2003-03-31 113LDNLX PSP 36 Mar 31, 2003 Errata This errata provides information applicable to the following MCU mask set devices: 2K38K masks of the MC68HC912D60A. None /docs/en/errata/MSE912D60A_2K38K.pdf English documents 180903 None 155452329886410597 2022-12-07 /docs/en/errata/MSE912D60A_2K38K.pdf 68HC912D60A Mask Set Errata: 2K38K - Errata /docs/en/errata/MSE912D60A_2K38K.pdf documents 155452329886410597 Errata N en None Y pdf 0 N 68HC912D60A Mask Set Errata: 2K38K - Errata 180.9 KB MSE912D60A_2K38K N 113LDNLX Product Change Notice 1 /docs/en/product-change-notice/PCN16235.htm 2014-05-20 1400655187257698150893 PSP 37 May 20, 2014 Product Change Notice None /docs/en/product-change-notice/PCN16235.htm English documents 311474 None 454076741825495278 2022-12-07 /docs/en/product-change-notice/PCN16235.htm Copper Wire Conversion for Microcontroller and Microprocessor Devices /docs/en/product-change-notice/PCN16235.htm documents 454076741825495278 Product Change Notice N en None D htm 0 N Copper Wire Conversion for Microcontroller and Microprocessor Devices 311.5 KB PCN16235 N 1400655187257698150893 Reference Manual 2 /secured/assets/documents/en/reference-manual/CPU12RM.pdf 2016-10-31 O966576741768 PSP 2 Mar 30, 2006 Reference Manual This manual describes the features and operation of the core (central processing unit, or CPU, and development support functions) used in all M68HC12 and HCS12 microcontrollers. The CPU12 is a high-speed, 16-bit processing unit that has a programming model identical to that of the industry standard M68HC11 central processor unit (CPU). The CPU12 instruction set is a proper superset of the M68HC11 instruction set. Registration without Disclaimer /secured/assets/documents/en/reference-manual/CPU12RM.pdf English documents 3476085 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=CPU12RM CPU12 - Reference Manual /secured/assets/documents/en/reference-manual/CPU12RM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 4 Y N CPU12 - Reference Manual 3.5 MB CPU12RM N O966576741768 /secured/assets/documents/en/reference-manual/CPU12RG.pdf 2016-10-31 A966576739154 PSP 3 Nov 26, 2001 Reference Manual CPU12 Reference Guide Registration without Disclaimer /secured/assets/documents/en/reference-manual/CPU12RG.pdf English documents 1336997 None 500633505221135046 2023-06-18 Y /webapp/Download?colCode=CPU12RG CPU12 Reference Guide /secured/assets/documents/en/reference-manual/CPU12RG.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 2 Y N CPU12 Reference Guide 1.3 MB CPU12RG N A966576739154 Technical Notes 4 /docs/en/engineering-bulletin/EB664.pdf 2006-08-07 1154978663218714732415 PSP 30 Aug 7, 2006 Technical Notes As a result of an investigation into issues reported by customers and analysis of related application modules, NXP has found that some units behave in a manner that may lead to these issues when the microcontroller is operated outside of its specification. This document describes this behavior and tells customers how to avoid the conditions that give rise to the issue. None /docs/en/engineering-bulletin/EB664.pdf English documents 162720 None 389245547230346745 2022-12-07 /docs/en/engineering-bulletin/EB664.pdf HC912D60A - HC912Dx128A 0.5 Microcontrollers /docs/en/engineering-bulletin/EB664.pdf documents 389245547230346745 Technical Notes N en None N pdf 6 N HC912D60A - HC912Dx128A 0.5 Microcontrollers 162.7 KB EB664 N 1154978663218714732415 /docs/en/engineering-bulletin/EB640.pdf 2004-12-03 1102097832501698152143 PSP 31 Dec 3, 2004 Technical Notes This document is intended for the users who would like to make better use of the PLL lock/unlock feature in their system. None /docs/en/engineering-bulletin/EB640.pdf English documents 61361 None 389245547230346745 2022-12-07 /docs/en/engineering-bulletin/EB640.pdf EB640: PLL Lock Detection on the HC12 D-Family /docs/en/engineering-bulletin/EB640.pdf documents 389245547230346745 Technical Notes N en None N pdf 0 N EB640: PLL Lock Detection on the HC12 D-Family 61.4 KB EB640 N 1102097832501698152143 /docs/en/engineering-bulletin/EB611.pdf 2003-07-10 1057853578534717323482 PSP 32 Jul 10, 2003 Technical Notes The HC12's enhanced capture timer (ECT) module is an updated version of the original Motorola HC11 Family timer. None /docs/en/engineering-bulletin/EB611.pdf English documents 264134 None 389245547230346745 2022-12-07 /docs/en/engineering-bulletin/EB611.pdf EB611/D: HC11 and HC12 Families' Pulse Accumulator /docs/en/engineering-bulletin/EB611.pdf documents 389245547230346745 Technical Notes N en None N pdf 0 N EB611/D: HC11 and HC12 Families' Pulse Accumulator 264.1 KB EB611 N 1057853578534717323482 /docs/en/engineering-bulletin/EB396.pdf 2016-10-31 C1024523882098 PSP 33 Jun 19, 2002 Technical Notes Engineering Bulletin None /docs/en/engineering-bulletin/EB396.pdf English documents 239585 None 389245547230346745 2022-12-07 N /docs/en/engineering-bulletin/EB396.pdf Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers /docs/en/engineering-bulletin/EB396.pdf documents 389245547230346745 Technical Notes N en None Y pdf 0 N N Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers 239.6 KB EB396 N C1024523882098 true Y Products

Documentation

Quick reference to our documentation types.

Filters

1-10 of 37 documents

Compact List

Application Note (26)
Show All

Design Files

Hardware

Quick reference to our board types.
Filters

1 hardware offering

Support

What do you need help with?

  • Narrow your search
Search