Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, -40 to 105C, Security enabled
Package
FBGA525: FBGA525, plastic, fine-pitch ball grid array; 525 bumps; 0.8 mm pitch; 19 mm x 19 mm x 1.62 mm body
Buy Options
LS1021AXE7MQB
Active
12NC: 935334234557
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Silicon Rev | Rev 2 |
Family | QorIQ LS1021A |
Development Tools | TWR-LS1021A |
Qualification tier | Industrial |
Core Type | Arm Cortex-A7 |
Core: Number of cores (SPEC) | 2 |
Operating Frequency [Max] (MHz) | 1200 |
Typical Power | 2.14 |
Cache (KB) | 32 |
L1 Cache (KB) | 32 |
L2 Cache (Max) (KB) | 512 |
SRAM (kB) | 128 |
External Memory Supported | DDR3L SDRAM, DDR4 SDRAM |
DRAM frequency (max)(MHz) | 1600 |
GPU 2D / GPU 3D | 2D ACE |
Serial Audio Interface (SAI) | 4 |
I2S | 4 |
| Parameter | Value |
|---|---|
SPI | 2 |
QSPI | 1 |
UART | 10 |
I2C | 3 |
USB Controllers | 2 |
CAN | 4 |
Ethernet Ports | 3 |
Ethernet Type | 100M, 10M, 1G |
PCIe | 2 |
PCIe version | PCIe 2.0 |
SATA | 1 x SATA 3.0 |
Encryption | Y |
Watchdog timer | Y |
Timers | 8 |
Debug & Trace | JTAG |
Junction Temperature (Min to Max) (℃) | -40 to 105 |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|---|
LS1021AXE7MQB(935334234557) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | e1 | REACH SVHC | 955.4 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Free Soldering | Lead Free Soldering | Lead Free Soldering | |||||
LS1021AXE7MQB (935334234557) | No | 3 | 260 | 40 | |||
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) | CCATS |
|---|---|---|---|
LS1021AXE7MQB (935334234557) | 854231 | 5A002A1 | G158338 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
LS1021AXE7MQB (935334234557) | 2025-04-16 | 2025-05-26 | 202504006I | Freescale Logo to NXP Logo Product Marking Conversion for All Remaining Former Freescale Products |
LS1021AXE7MQB (935334234557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about LS1021A
The LS1 family, which includes the LS1021A communications processor, is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale.
A member of the value-performance tier, the LS1021A processor provides extensive integration and power efficiency for fanless, small form factor enterprise networking applications. Incorporating dual Arm® Cortex®-A7 cores running up to 1.2 GHz, the LS1021A processor is engineered to deliver CoreMark® performance of over 7,000, as well as virtualization support, advanced security features and the broadest array of high-speed interconnects and optimized peripheral features ever offered in a sub-3 W processor.
The LS1021A processor features an integrated LCD controller, CAN controller for implementing industrial protocols, DDR3L/4 running up to 1600 MHz, integrated security engine and QUICC Engine® and ECC protection on both L1 and L2 caches. The LS1021A processor is pin- and software-compatible with the LS1020A and LS1022A processors.
Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.