Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Buy Options
LPC4074FBD144,551
Active
12NC: 935297185551
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Core Type | Arm Cortex-M4 |
Operating Frequency [Max] (MHz) | 120 |
Flash (kB) | 128 |
SRAM (kB) | 40 |
EEPROM (kB) | 0.002 |
Serial Communication | 3 x I²C, 3 x SPI, 4 x UART |
| Parameter | Value |
|---|---|
CAN | 2 |
USB Controllers | 1 |
ADC [Number, bits] | 1 x 12 |
GPIO | 109 |
Supply Voltage [Min to Max] (V) | 2.4 to 3.6 |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 85 |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
LPC4074FBD144,551(935297185551) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 1253.6712309712 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | ||
|---|---|---|---|---|---|
| Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | ||
LPC4074FBD144,551 (935297185551) | No | 2 | 2 | 225 | 260 |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
LPC4074FBD144,551 (935297185551) | 854231 | 3A991A2 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
LPC4074FBD144,551 (935297185551) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
LPC4074FBD144,551 (935297185551) | 2018-02-02 | 2018-02-12 | 201801029I | Changing Packing Trays for Products in 14x14 and 20x20 (H)LQFP Packages. |
More about LPC4074FBD144
The LPC408x/7x is an Arm® Cortex®-M4 based digital signal controller for embedded applications requiring a high level of integration and low power dissipation.
The Arm Cortex-M4 is a next generation core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated in the core for several versions of the part.