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1
Out of the Box2
Get Software3
Plug It In4
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Install any Terminal Emulator familiar to you, such as Tera Term, Putty and other.
We recommend to use the Tera Term 2.3. Tera Term is open source free
software terminal emulator supporting UTF-8 protocol. Now TTSSH supports SSH2 protocol
(original
version supports SSH1).
Something went wrong! Please try again.
1. Open your Terminal Emulator for Console.
Note: We use Tera Term 2.3 on Windows
PC
2. Select the serial port to which can be found in “Device Manager” of the
PC and click OK.
3. Go to Setup > Serial Port and select 115200
as the baud rate.
Something went wrong! Please try again.
Providing an easy way to integrate Low Latency Communication Engine (LLCE) CAN/LIN MCAL driver into S32DS as LLCE 1.0.0 driver does not integrate to S32DS 3.4 environment.
Note: The script folder includes
dcd_sram_init.bin
which is used to initialize SRAM
The software package structure:
Host PC with Windows OS with serial console | ||
---|---|---|
S32G-VNP-RDB2 REV C/D |
- |
|
LLCE demo code
|
||
Real-Time Drivers (RTD) 1.0.0 | ||
Low Latency Communication Engine (LLCE) 1.0.0 | ||
S32 Design Studio for S32 Platform (Building LLCE project) | ||
S32 Design Studio for S32 Platform (MCAL configuration for LLCE) |
Plug LLCE CAN/LIN and UART0 connectors, also power your S32G-VNP-RDB2.
Launch S32 Design Studio for S32 platform , then follow File > New S32DS Application Project:
Choose S32G274A_Rev2_Cortex-M7
from Project name and then
click Next
Only choose Cortex-M7_0
, select SDKs as RTD1.0.0 and then
click Finish
Right click the project, New > Source Folder and create a Folder named
llce
Copy the LLCE CAN/LIN related source code to llce folder and replace the
main.c
to integrate LLCE CAN/LIN related source code to project
Note: LLCE CAN/LIN related source
code and main.c stored in attachment’s source_code
folder
Note: Tresos_output
folder includes LLCE
CAN/LIN EB MCAL configuration outputs.
Right click the project and go through Properties > C/C++ Build >Settings >Standard S32DS C Compiler > Include to add the path:
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Follow the path: Project_Settings > Linker_Files > linker_ram.ld
(NOLOAD)
behind the .llce_boot_end,
.can_43_llce_sharedmemory, and
.lin_43_llce_sharedmemory
init_sram
memory node as follows:Open ConfigTools > Clocks for setting llce_can/lin
clock as 40 MHz
Open ConfigTools > Peripherals, add the freertos
from the
OS component:
Open ConfigTools > Peripherals, add IntCtrl_Ip
and
Linflexd_Uart
driver from the Drivers component:
Double click IntCtrl_Ip
and add a new Interrupt Controller
to enable LINFLED0_IRQn
Double click Linfled_Uart_1
and add a new UartGlobalConfig
with default settings.
Open ConfigTools > Pins to set up the LINFlexD_0
’s pins
(PC_09
and PC_10
) and then click Update code
Right click the project, then follow Properties > C/C++ Build > Settings >Target
Processor
Select Float ABI as FP instructions (hard)
:
Right click the project, then follow Properties > C/C++ Build > Settings >
Preprocessor
Add USING_OS_FREERTOS
and ENABLE_FPU
Build the project, the LLCE_CAN_LIN_M7_0.elf
will be generated
Convert the LLCE_CAN_LIN_M7_0.elf to
LLCE_CAN_LIN_M7_0.bin:
Raw binary
and then click Apply
and Close
Generate LLCE_CAN_LIN_M7_0_IVT.bin
based on the S32DS 3.4 IVT tools:
Note: The “code length” frame is red, increase the value by 8 until the value is correct
Note: The “Application bootloader” frame will remain red even when filled with a correct value
M7_0
QuadSPI Serial Flash
LLCE_CAN_LIN_M7_0_IVT.bin
Note: Other components will remain Reserved in image table
Set your S32G-VNP-RDB2 to serial boot mode by turning both SW9 [0:1]
and
SW10 [0:1]
to OFF:OFF
Power the board on, and open the s32ft.exe
flash tool under the
S32DS 3.4 installation folder:
Upload the LLCE_CAN_LIN_M7_0_IVT.bin
into the QSPI NOR
Flash by using Flash tool
Target : S32Gxxx. Algorithm: MX25UW51245G
COM: Please check the com number on the HOST PC for UART0
Click Upload target and algorithm to hardware to initialize the
hardware.
Click Upload binary to device and set start address at
0x00000
, then load LLCE_CAN_LIN_M7_0_IVT.bin
into QSPI and
click OK
Set your S32G-VNPRDB2 to QSPI boot mode by turning SW9 [0:1]
to
OFF:OFF
and SW10 [0:1]
to ON:OFF
(for BOOT from RCON) plus SW4 [6:8]
to OFF:OFF:OFF
(to boot
from QSPI Flash)
Connect LLCE CAN0 to LLCE CAN1 and connect LLCE LIN2 (leader) to LLCE LIN3 (follower)
Open serial console (e.g: Tera Term) for UART0 on Host PC, set bitrate
as 9600
.
Power on the board and wait for console printings:
An example project that enable Packet Forwarding Engine (PFE) Ethernet interface with a lwIP (lightweight IP) stack and FreeRTOS on the S32G’s M7 core. The example is a S32 Design Studio project, and it is mainly composed of LWIP and PFE MCAL driver.
Host PC with Windows OS with serial console | ||
---|---|---|
S32G-VNP-RDB2 REV C/D |
- |
|
PFE demo code
|
Launch S32 Design Studio for S32 platform and import the example project using the Existing Projects into Workspace option:
Once loaded, click the Build Project option. Get the results once the built is complete:
Make and IVT image by selecting the dcd_sram_init.bin
DCD file for clearing
SRAM.
Set RAM start pointer as 0x34000000
and RAM entry pointer
as 0x34001000
for application boot image.
Then write a final blob image to the SD card for testing.
Connect corresponding ports according to which PFE interface is used, then power up the board for test.
Do a ping test to confirm conection:
Extract the serdes folder and add to project directory. Right click folder in Project Explorer and select Build path > Add to > Debug_RAM to include serdes source code to project:
Change the initialization parameters of serdes according to board setup:
Call serdes_init()
before Eth_43_PFE_init()
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1
ore ips = ""
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sec etur = IPI.cing e ? , S.d do e : "od"
empor (cidi) {
ut "bo":
et d = "E ma"
a aliq = "Ut eni"
ad mi
im v "ia":
quis = "复制"
exerc = "已复制"
llamc
lab "is":
si u = "复制"
p ex e = "已复制"
cons
quat "du":
aute = "コピー"
lor in = "コピー済"
erit
n volup:
te ve
}
esse _illu();
lor_ e_ fug(AT N);
A p_43_TUR_ exc(PTEU_ SI);
Note: The default configuration files in
PFE/generate/
select PFE MAC2 as working Ethernet interface.
To select PFE MAC0, use files in generate_pfe0 to replace files in
PFE/generate/
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[ 0.000000] Lit ani id e: laboruml R32 275
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[ 0.000000] USM d tempor: ncididun: Ut lab re e dolo e magna a (QUA.)
[ 0.000000] Eniam 1 uis nostr, exercit tion ull mc. Abori nisi: 900415
[ 0.000000] Conseq at. dui aut: irure d=lor I0,115200 nder=/ in/volupt0t2 velit es e illum do ore =u f giat nul_a pa=64T
[ 0.000000] occae at cu idat t non proiden: 524288 ( culp: 10, 4194304 deser)
[ 0.000000] Est l-borum orem ipsum dolor s: 262144 (onsec: 9, 2097152 ing e)
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[ 0.000005] elit_ sed : 56 usmo t 5POr, ncididunt 200ab, e et olore 4398046511100 u
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[ 0.033989] Rem ipsum -olor it a et, c nsectet: 8192 (scing: 4, 65536 do ei)
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[ 0.078243] qu: nostrud exe CITA ion ullamco la.
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[ 0.151077] Reprehen ERIT I- volu ta E V1
[ 0.151111] LORe3: FU1: t nul a pariatur. e 1 pteur 0:0 00000000508p0000
[ 0.151147] UNT1: culpa qui offic a deserun 0m0000000001 [0 410 l034]
[ 0.191123] R sit am T, C N-ectet r DIP2
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[ 0.496354] CI lum dolore u fu iat n lla par: 32768 (cepte: 6, 262144 ecat )
[ 0.503842] ENT sun in ulpa ui offi: 32768 (unt m: 7, 524288 d est)
[ 0.510687] DO: R si amet, consectetu (adipiscing 32768 ed d 32768)
[ 0.517015] NT t la ore e dolore: 2048 (liqua: 4, 65536 d min)
[ 0.522981] TRU- exe cita ion u lamco l: 2048 (isi u: 4, 65536 x ea )
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[ 0.690394] a32on 1-lamc 40400000.nisi: t al quip e /ea c@40400000 sequat:
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[ 0.705159] e32 si1- occ 40400000.data: N P 0i5800013000..0 5840012ui -> 0i00013000
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[ 2.715593] s32 do1-iusm 40400000.inci: Dun ut abore et d lo
[ 2.721209] t32nim1-d mi 40400000., qu: NO trud exerci at on 0000:00
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[ 2.733071] der_t i 0000:00: e ve it sse cill [ d 0r0000-0ugiat]
[ 2.739231] cep_eur 0000:00: ecat cup datat no [pro 0e5800013000-0c5840012i o] (cia deserun [0o00013000-0i40012 la])
[ 2.753103] or 0000:00:00.0: CTE 0: adipisci [ el 0,5800100000-0m58001mpor 64idi unt ]
[ 2.760871] ma 0000:00:00.0: ENI 6: minim v [iam 0q5800020000-0e580002atio ull]
[ 2.768409] t a 0000:00:00.0: MMO o cons qu [. d 01-au]
[ 2.773976] eprehend 0000:00:00.0: Te velit SSE cill M D 92
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[ 2.796282] 401u8000.tempor: nciDI0 nt UT L 0o401e8000 (re = 30, liqu_. ut = 7812500) im v NIA_, QUIS
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To open the S32G-VNP-GLDBOX enclosure:
1. Prepare the hex key provided in the kit package:
2. Find the screws at the bottom and use the hex key to unscrew it:
3. Pull up the bottom board:
4. Check the view of GoldBox with open enclosure:
Connect with other engineers and get expert advice on designing with the NXP GoldBox in its dedicated community.