Battery Management Control
NXP solutions enable AD/DC chargers in hybrid electric vehicles (HEV). The AD/DC charger interfaces with the battery management system to ensure a proper charge of electricity of the cells until it fulfills high-voltage (HV) requirements. Our comprehensive portfolio provides the critical building blocks for high-performance, efficient and safe power management control system for electric traction motors.
Product Details
Block Diagram
Supported Devices
Power Management
System Basis Chips
- FS6500: Grade 1 and Grade 0 Safety Power System Basis Chip with CAN Flexible Data Transceiver
Analog and Mixed Signal
Real-Time Clocks
- PCA85073A: Automotive Tiny Real-Time Clock/Calendar with Alarm Function and I²C-Bus
Processors and Microcontrollers
S32K Auto General-Purpose MCUs
- S32K1: S32K1 Microcontrollers for Automotive General Purpose
Interfaces
Automotive LIN Solutions
- MC33660: ISO K Line Serial Link Interface
Features
FS6500 Features
- Battery voltage sensing and MUX output pin
- Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost and standard buck
- The family of devices to supply MCU core from 1.0 V to 5.0 V, with SMPS (0.8 A, 1.5 A or 2.2 A) or LDO (0.5 A)
- 36 V maximum input operating voltage
- Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (VCCA tracker or independent), 5.0 V or 3.3 V
- Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply, 5.0 V or 3.3 V
- 3.3 V keep alive memory supply available in low-power mode
- Long duration timer, counting up to 6 months with 1.0 s resolution
Scalable single platform
- 48 MHz Cortex®-M0+ core or 80/112 MHz Cortex-M4F core
- 128 kB to 2 MB flash memory with ECC. Up to 4 KB EEPROM
- 12-bit 1 Msps ADC, 16-bit FlexTimers with dead-time insertion and fault detection
- Scalable low power Run and Stop modes. Fast wake-up, clock and power gating
- QFN, LQFP and MAPBGA packages. -40 to 125/150° C. Minimum 15 years longevity
MC33660 Key features
- Interfaces Directly to Standard CMOS Microprocessors
- ISO K Line Pin Protected Against Shorts to Battery
- Thermal Shutdown with Hysteresis
- ISO K Line Pin Capable of High Currents
- ISO K Line Can Be Driven with up to 10 nF of Parasitic Capacitance
- 8.0 kV ESD Protection Attainable with Few Additional Components
- Standby Mode: No VBat Current Drain with VDD at 5.0 V
- Low Current Drain During Operation with VDD at 5.0 V
Documentation
Quick reference to our documentation types.