QorIQ® P1022 and P1013 Dual- and Single-Core Communications Processors

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Block Diagram

NXP QorIQ P1022/13 Communication Processor Block Diagram

NXP QorIQ P1023/13 Communication Processor Block Diagram

Features

Core Complex

  • Dual (P1022) or single (P1013) high-performance Power Architecture e500 cores
  • Core frequencies from 667 MHz to 1200 MHz
  • 32 KB L1 I/D caches
  • 256 KB L2 cache with ECC.
    • Also configurable as SRAM and stashing memory

Networking Elements

  • Two 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
  • High-speed interfaces supporting various multiplexing options:
    • Six SerDes up to 3.125 GHz multiplexed across controllers
    • Three PCI Express® interfaces
    • Two SGMII interfaces
    • Two serial ATA interfaces

Accelerators and Memory Control

  • 32/64-bit DDR2/DDR3 SDRAM memory controller with ECC support
  • Integrated security engine
    • Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi, XOR acceleration

Basic Peripherals and Interconnect

  • Dual high-speed USB controllers (USB 2.0)
  • eLBC, TDM, I²S, eSDHC, Dual I²C, DUART, PIC, DMA, GPIO

Additional Features

  • LCD interface supporting a display of 1280 x 1024P
    • @ 60 Hz, 24 bits per pixel
  • Advanced power management

Comparison Table

P1013 P1022
Cores 1 2
Core Frequency 667 - 1067 MHz 667 - 1067 MHz
L2 Cache 256KB 256KB
DDR 32/64-bit DDR2/DDR3 32/64-bit DDR2/DDR3
GbE 2 x 10/100/1000 2 x 10/100/1000
PCIe Gen 1.0 2 controllers w/ 4 SERDES 2 controllers w/ 4 SERDES
USB 2.0 2 2
Memory Card SD/MMC SD/MMC
Other interfaces Dual- SATA, LCD I/F, SPI, 2xI²C, DUART Dual- SATA, LCD I/F, SPI, 2xI²C, DUART
Accelerators SEC3.1 SEC3.1

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Documentation

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Design Files

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1 design file

Software

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3 software files

Note: For better experience, software downloads are recommended on desktop.

Training

1 trainings

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