Ultra-Reliable KEA Automotive Microcontrollers (MCUs) based on Arm® Cortex®-M0+ Core

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Block Diagram

KEA/C9KEA Main Features

3 Phases Sensorless BLDC Motor Control Block Diagram

Features

Performance

  • Up to 48 MHz Arm Cortex M0+ core
  • Single-cycle 32-bit x 32-bit multiplier

Memory

  • Up to 128K embedded flash
  • Up to 256 B EEPROM
  • Up to 16K RAM

Clocks

  • External Oscillator (OSC)
  • Internal Clock Source (ICS)

System functions

  • Power management module (PMC) with three power modes: Run, Wait, Stop
  • Low-voltage detection (LVD) with reset or interrupt, selectable trip points
  • Watchdog with independent clock source (WDOG)
  • Programmable cyclic redundancy check module (CRC)
  • Serial wire debug interface (SWD)
  • Aliased SRAM bitband region (BITBAND)
  • Bit manipulation engine (BME)

Communication interfaces

  • Up to two SPI modules
  • Up to three UART modules
  • Up to two IIC modules
  • Up to one CAN module

Multiple Timers

  • One 6-channel FlexTimer/PWM (FTM)
  • Up to two 2-channel FlexTimer/PWM (FTM)
  • One 2-channel periodic interrupt timer (PIT)
  • One pulse width timer (PWT)
  • One real-time clock (RTC)

Analog modules

  • One 16-channel 12-bit SAR ADC with internal bandgap reference channel, operation in Stop mode, optional hardware trigger (ADC)
  • Two analog comparators containing a 6-bit DAC and programmable reference input (ACMP)

Family Comparison Table

Device Flash RAM EEPROM Freq MSCAN SCI SPI ADC Flex-Timer IIC GPIO Packages
KEAZN8 8K 1K Emulated 48MHz 0 1 1 12ch 12bit 6ch+2ch 16bit 1 Up to 22 16 TSSOP/24 QFN
KEAZN16 16K 2K 256B 40MHz 0 3 2 16c12b 6ch+2ch+2ch 16bit 2 Up to 57 32/64 LQFP
KEAZN32 32K 4K 256B 40MHz 0 3 2 16c12b 6ch+2ch+2ch 16bit 2 Up to 57 32/64 LQFP
KEAZN64 64K 4K 256B 40MHz 0 3 2 16c12b 6ch+2ch+2ch 16bit 2 Up to 57 32/64 LQFP
KEAZ64 64K 8K Emulated 48MHz 1 3 2 16c12b 6ch+2ch+2ch 16bit 2 Up to 71 64/80 LQFP
KEAZ128 128K 16K Emulated 48MHz 1 3 2 16c12b 6ch+2ch+2ch 16bit 2 Up to 71 64/80 LQFP

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Training

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