Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
Package
LFBGA96: plastic, low profile fine-pitch ball grid array package; 96 balls; 0.8 mm pitch; 13.5 mm x 5.5 mm x 1.5 mm body
Buy Options
SSTUB32866EC/G,518
No Longer Manufactured
12NC: 935281279518
Details
Order
SSTUB32866EC/G,551
No Longer Manufactured
12NC: 935281279551
Details
Order
SSTUB32866EC/G,557
No Longer Manufactured
12NC: 935281279557
Details
Order
SSTUB32866EC/S,518
No Longer Manufactured
12NC: 935283144518
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Security Status | COMPANY PUBLIC |
Function | Latches/registered drivers |
Description | 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications |
| Parameter | Value |
|---|---|
Number of pins | 96 |
Package Style | LFBGA |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
SSTUB32866EC/G,518(935281279518) | Yes | Yes | No |  | REACH SVHC | 200.0 |
SSTUB32866EC/G,551(935281279551) | No | No | - | REACH SVHC | - | |
SSTUB32866EC/G,557(935281279557) | No | No | - | REACH SVHC | - | |
SSTUB32866EC/S,518(935283144518) | Yes | Yes | No | | REACH SVHC | 200.0 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | ||
|---|---|---|---|---|---|
| Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||
SSTUB32866EC/G,518 (935281279518) | - | 2 | 240 | 260 | |
SSTUB32866EC/G,551 (935281279551) | - | - | - | - | |
SSTUB32866EC/G,557 (935281279557) | - | - | - | - | |
SSTUB32866EC/S,518 (935283144518) | - | 2 | 240 | 260 | |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer |
|---|---|
SSTUB32866EC/G,518 (935281279518) | 854239 |
SSTUB32866EC/G,551 (935281279551) | 854239 |
SSTUB32866EC/G,557 (935281279557) | 854239 |
SSTUB32866EC/S,518 (935283144518) | 854239 |
Discontinued and Replacement Part Data
| Part/12NC | Discontinuance Notice | Last Time Buy Date | Last Time Delivery Date |
|---|---|---|---|
SSTUB32866EC/G,518 (935281279518) | - | 2002-12-31 | 2002-12-31 |
SSTUB32866EC/S,518 (935283144518) | - | 2002-12-31 | 2002-12-31 |
More about SSTUB32866EC
Archived content is no longer updated and is made available for historical reference only.
The SSTUB32866 is a 1.8 V configurable register specifically designed for use on DDR2 memory modules requiring a parity checking function. The register is configurable (using configuration pins C0 and C1) to two topologies: 25-bit 1 : 1 or 14-bit 1 : 2, and in the latter configuration can be designated as Register A or Register B on the DIMM.
The SSTUB32866 accepts a parity bit from the memory controller on its parity bit (PAR_IN) input, compares it with the data received on the DIMM-independent D-inputs and indicates whether a parity error has occurred on its open-drain QERR pin (active LOW). The convention is even parity, that is, valid parity is defined as an even number of ones across the DIMM-independent data inputs combined with the parity input bit.
The SSTUB32866 is packaged in a 96-ball, 6 × 16 grid, 0.8 mm ball pitch LFBGA package (13.5 mm × 5.5 mm).