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The NXP analog product development boards provide an easy-to-use platform for evaluating NXP products. The boards support a range of analog, mixed-signal and power solutions. They incorporate monolithic integrated circuits and system-in-package devices that use proven high-volume technology. NXP products offer longer battery life, a smaller form factor, reduced component counts, lower cost and improved performance in powering state-of-the-art systems.
This page will guide you through the process of setting up and using the KITPF5300SKTEVM board.
The KITPF5300SKTEVM kit contents include:
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The software listed here must be installed before working with this evaluation board.
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The KITPF5300SKTEVM provides a way to OTP program the PF5300 and conduct basic power-up testing of a programmed part. Loading of the DC-DC converter is not allowed.
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Table 1. Board description
Position | Function | Description |
---|---|---|
J5 |
EXT_8V | 8.0 V supply input needed for OTP programming |
J8 |
VIN / PVIN | Input power supply (3.3 V) |
J9 , J6 |
GND | Ground |
J4 |
Output voltage | Output voltage |
J12 |
STANDBY | 1-2: Default. STANDBY = GND 2-3: STANDBY = VDDIO |
J10 |
PWRON Functional control |
Open: Default. PWRON controlled through J16 . 1-2: PWRON = GND 2-3: PWRON = VDDIO Use only if J16 is open. |
J13 |
VDDOTP configuration | Open: Default. Use for OTP programing. 1-2: Connect to ground. 2-3: Pull up to VDDIO. Use if trying XFAILB functionality. |
J4 |
VDDOTP 8V selection | 1-2: Do not apply EXT_8V to VDDOTP/XFAILB pin 2-3: Default. Apply 8V_EXT to VDDOTP/XFAILB pin Open: If evaluating XFAILB functionality |
J5 |
PWRON configuration | Control PWRON voltage in relation to EXT_8V 1-2: Apply EXT_8V/2 to PWRON pin 2-3: Default. Apply EXT_8V to PWRON pin |
J6 |
PWRON connectivity | Open: PWRON controlled by J10 Closed: Default. PWRON controlled by J15 /MCU. |
J1 |
VDDIO supply | Closed: Default |
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Once the user has installed the NXP GUI, follow these instructions to quickly power up the board.
SW4
is in the NORMAL position.J10
from 1-2 to 2-3 to turn on the PF53.Debug mode allows the user to modify OTP mirror registers before powering up. This facilitates exercising different features of the PF5300 while deciding on the best configuration for a given application.
J5
.J8
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In addition to our PF53, 12 A/8 A/15 A Core Supply Regulator with AVP and Watchdog page, you may also want to visit: