As Open RAN (O-RAN) continues to be deployed across the world, NXP enables
faster 5G O-RAN deployments by creating enhanced reference designs. This
includes an RF approach into customer designs with our RapidRF Smart LDMOS
front-end solutions known as the 'SL Series'.
NXP’s 2nd generation RapidRF front-end reference board has been
designed to save board space, reduce overall complexity and provide a complete
ready-to-use circuit for TDD cellular applications. Like previous generations,
this 2nd generation RapidRF implements fully matched amplifiers 50
ohms in and 50 ohms out. This allows for a complete line-up with no tuning
required for ease of use.
RapidRF reference circuit showing complete layout of NXP’s PA, pre-driver,
Rx LNA with T/R switch and a circulator.
The 2nd generation RapidRF now also includes a PA module with
integrated autobias control that is factory preset for the optimal bias point,
or it can be adjusted by the programmable serial interface to adjust for each
application. The integrated autobias control has a novel closed-looped
feedback circuit that adjusts the LDMOS gate voltage to maintain a consistent quiescent bias current for continuous temperature tracking. The integrated
precise temperature sensor can be accessed via the serial interface for
closely monitoring the PA’s operating temperature. With NXP’s full TX/RX
line-up already implemented within the board, it streamlines
5G mMIMO
radio designs because of its smaller, light weight assembly. The series is
ideally suited for massive MIMO radio units (64T64R), outdoor small cells and
as drivers for high-power macro base stations.
Block diagram of the RapidRF Smart LDMOS front-end design
No Compromise on Performance
The RapidRF design offers an overall compact footprint that still delivers on
performance. Its integrated Doherty power amplifier is in a 10mm x 8mm package
that delivers 40% efficiency at rated power. The design also includes a linear
pre-driver, Rx LNA with T/R switch and a circulator.
An up close image of the RapidRF line-up showing the module and additional
components.
The RapidRF front-end designs are ideal for 5G radio units requiring 2.5 to 8
Watts (34-39 dBm) average transmit power at the antenna. Versions for multiple
bands use a common PCB layout, simplifying both design and manufacturing for
faster time-to-market.
NXP reference designs help enable faster 5G O-RAN deployments. Access key insights about RapidRF in the
fact sheet and
user guide.
Want more information? Access our website.
The new RapidRF boards are available for order through our website. You can
find our extensive set of reference circuits that cover 3.4 – 4.0 GHz.
RAPIDRF-36SL039 |
3400-3800 MHz,
8 W Avg. at 8 dB OBO
|
64T64R mMIMO radio unit for B42 and B48 bands
A3M36SL039:
Multi-Chip Module with integrated bias control
BTS6201U:
Tx pre-driver
BTS7203U:
Rx analog front-end IC with LNA/Tx switch
|
Now
|
RAPIDRF-39SL039 |
3700-4000 MHz,
8 W Avg. at 8 dB OBO
|
64T64R mMIMO radio unit for C-band
A3M39SL039:
Multi-Chip Module with integrated bias control
BTS6201U:
Tx pre-driver
BTS7203U:
Rx analog front-end IC with LNA/Tx switch
|
Dive deeper into NXP's RapidRF 'SL' front-end designs.