Design Files
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This 20-bit bus switch is designed for 2.3 V to 2.7 V VDD operation and SSTL_2 select input levels.
Each host port pin is multiplexed to one of two DIMM port pins. When the SEL pin is HIGH the A DIMM port is turned on and the B DIMM port is off. The ON-state connects the host port to the DIMM port through a 20 Ω nominal series resistance. When the port is off a high-impedance state exists between the Host and disabled DIMM. The DIMM port is terminated with a 100 Ω resistor to ground. When the SEL pin is LOW the B DIMM port is turned on and the A DIMM port is off.
The part incorporates a very low crosstalk design. It has a very low skew between outputs (< 50 ps) and low skew (< 50 ps) for rising and falling edges. The part has optimal performance in DDR data bus applications.
Each switch has been optimized for connection to 1-bank or 2-bank DIMMs.
The low internal RC time constant of the switch (20 Ω x 7 pF) allows data transfer to be made with minimal propagation delay.
The CBTV4020 is characterized for operation from 0 Cel to +85 Cel.
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Receive the full breakdown. See the product footprint and more in the eCad file.
Receive the full breakdown. See the product footprint and more in the eCad file.