Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
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Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
12NC: 935284111512
Details
Order
Parameter | Value |
---|---|
Security Status | COMPANY PUBLIC |
Description | 8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals |
Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
---|---|---|---|---|---|---|
P89CV51RB2FA,512(935284111512) | Yes | Yes | No | REACH SVHC | 2280.0 |
Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | ||
---|---|---|---|---|---|
Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | ||
P89CV51RB2FA,512 (935284111512) | No | 3 | 3 | 225 | 245 |
Part/12NC | Harmonized Tariff (US)Disclaimer |
---|---|
P89CV51RB2FA,512 (935284111512) | 854231 |
Part/12NC | Discontinuance Notice | Last Time Buy Date | Last Time Delivery Date |
---|---|---|---|
P89CV51RB2FA,512 (935284111512) | - | 2002-12-31 | 2002-12-31 |
Archived content is no longer updated and is made available for historical reference only.
The P89CV51RB2/RC2/RD2 are three types of 80C51 microcontroller with respectively 16 kB/32 kB/64 kB flash and 1 kB of data RAM. These devices are designed to be drop-in and software-compatible replacements for the popular P89C51RB2/RC2/RD2 devices. Both the In-System Programming (ISP) and In-Application Programming (IAP) boot codes are upward compatible.
Additional features of the P89CV51RB2/RC2/RD2 devices compared to the P89C51RB2/RC2/RD2 are the inclusion of an SPI interface, larger RAM size, and the ability to erase code memory in 128-B page blocks.
The IAP capability combined with the 128-B page size allows for efficient use of the code memory for non-volatile data storage.