Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
80C51 8-bit microcontroller family 128/256 byte RAM ROMless low voltage (2.7 V-5.5 V), low power, high speed (33 MHz)
Buy Options
P80C31SFAA,112
No Longer Manufactured
12NC: 935255560112
Details
Order
P80C31SFAA,512
No Longer Manufactured
12NC: 935255560512
Details
Order
P80C31SFAA,518
No Longer Manufactured
12NC: 935255560518
Details
Order
P80C31SFAA/G,512
No Longer Manufactured
12NC: 935278069512
Details
Order
P80C31SFAAJ
No Longer Manufactured
12NC: 935255560118
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Security Status | COMPANY PUBLIC |
Description | 80C51 8-bit microcontroller family 128/256 byte RAM ROMless low voltage (2.7 V-5.5 V), low power, high speed (33 MHz) |
Number of pins | 44 |
| Parameter | Value |
|---|---|
Package Style | PLCC |
Product category | 230-OTP/ROM- |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC |
|---|---|---|---|---|---|
P80C31SFAA,112(935255560112) | No | No | - | REACH SVHC | |
P80C31SFAA,512(935255560512) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC |
P80C31SFAA,518(935255560518) | No | No | - | REACH SVHC | |
P80C31SFAA/G,512(935278069512) | No | No | - | REACH SVHC | |
P80C31SFAAJ(935255560118) | No | No | - | REACH SVHC |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | FIT | MTBF | IR | ||
|---|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||||
P80C31SFAA,112 (935255560112) | - | - | - | - | - | 2.84 | 2.58397932816537E8 | 0.0 |
P80C31SFAA,512 (935255560512) | No | 3 | 3 | 225 | 245 | 2.84 | 2.58397932816537E8 | 0.0 |
P80C31SFAA,518 (935255560518) | - | - | - | - | - | 2.84 | 2.58397932816537E8 | 0.0 |
P80C31SFAA/G,512 (935278069512) | - | - | - | - | - | 2.84 | 2.58397932816537E8 | 0.0 |
P80C31SFAAJ (935255560118) | - | - | - | - | - | 2.84 | 2.58397932816537E8 | 0.0 |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer |
|---|---|
P80C31SFAA,112 (935255560112) | 854231 |
P80C31SFAA,512 (935255560512) | 854231 |
P80C31SFAA,518 (935255560518) | 854231 |
P80C31SFAA/G,512 (935278069512) | 854231 |
P80C31SFAAJ (935255560118) | 854231 |
Discontinued and Replacement Part Data
| Part/12NC | Discontinuance Notice | Last Time Buy Date | Last Time Delivery Date | Replacement |
|---|---|---|---|---|
P80C31SFAA,512 (935255560512) | - | 2004-12-31 | 2004-12-31 | None |
P80C31SFAA,518 (935255560518) | - | - | - | None |
P80C31SFAA/G,512 (935278069512) | - | 1999-01-30 | 1999-12-31 | - |
P80C31SFAAJ (935255560118) | - | 2000-12-31 | 2001-01-30 | - |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
P80C31SFAA,512 (935255560512) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about P80C31SFAA
The Philips 80C31/32 is a high-performance static 80C51 design fabricated with Philips high-density CMOS technology with operation from 2.7 V to 5.5 V.
The 80C31/32 ROMless devices contain a 128 ? 8 RAM/256 ? 8 RAM, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.
In addition, the device is a low power static design which offers a wide range of operating frequencies down to zero. Two software selectable modes of power reduction-idle mode and power-down mode are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data and then the execution resumed from the point the clock was stopped.