5G
NXP’s 5G Access Edge technologies, based on the open O-RAN architecture, let designers deploy tailored 5G solutions faster while giving them an easier, more cost-effective way to maintain, upgrade, and extend their 5G capabilities. To deliver the ultra-high reliability and ultra-low latency required for dependable, real-time 5G interactions, more must happen at the Edge.
This 5G Access Edge is where the critical network infrastructure equipment sits between the 5G core and the end-user equipment.
Product Details
Block Diagram
Choose a diagram:
Supported Devices
RF
Legacy 5G mmWave
- MMW9012K: 26.5 GHz–29.5 GHz 4-Channel Dual-Polarized Analog Beamforming Integrated Circuit
Sensors
I3C/I²C Digital Temp. Sensors
- SA56004X: SMBus-Compatible, 8-Pin, Remote/Local Digital Temperature Sensor
Power Management
PMICs
- PF81-PF82: 12-Channel Power Management Integrated Circuit (PMIC) for High-Performance Processing Applications
Interfaces
High-Speed Multiplexer
- CBTU02043HE: High-Speed Differential 1-to-2 Switch Chip
General Purpose I/O (GPIO)
- PCAL6408A: Low-Voltage Translating, 8-Bit I²C-Bus/SMBus I/O Expander
I²C Logic Multiplexers/Switches
- PCA9545A_45B_45C: Four-Channel I2C-Bus Switch with Interrupt Logic and Reset
USB Interfaces
- PTN36241G: SuperSpeed USB 3.0 Redriver
Analog and Mixed Signal
Voltage Level Translators
Real-Time Clocks
- PCF2131: Nano-Power Highly Accurate RTC with Integrated Quartz Crystal
Analog Switches
- NX3L2467: Dual Low-Ohmic Double-Pole Double-Throw Analog Switch
Processors and Microcontrollers
Layerscape Processors
- LS1046A: Layerscape® 1046A and 1026A Processors
Wireless Connectivity
Bluetooth Low Energy
- QN9090-30: QN9090/30: Bluetooth Low-Energy MCU with Arm®Cortex®-M4 CPU, Energy Efficiency, Analog and Digital Peripherals and NFC Tag Option
LX2160A Features
- 16 Cortex®-A72 CPU cores, running up to 2.2 GHz
- 18 MB cache/on-chip memory
- 24 SerDes lanes, operating up to 25 GHz
- Up to 16 Ethernet ports
- Supported Ethernet speeds include 1, 2.5, 10, 25, 40, 50, and 100 gigabits per second
- 114 Gbps Layer 2 Ethernet switch
LS1046A Features
- Four Cortex-A72 cores
- 2 MB L2 cache
- 2x 10 GbE, 1x 2.5 GbE, and 5x GbE
- Eight-lane SerDes up to 10 GHz multiplexed across controllers supporting:
- DPAA Parse, Classify, and Distribution Engines
- Integrated security engine
- 3x PCIe 3.0 Controllers, x4, x2, x1
LA12xx Features
- > 1 TFLOPs VSPA Vector Engine performance
- Integrated High Speed and Low Speed ADC/DACs for mmWave and sub-6 GHz applications
- High performance Polar and LDCP Forward Error Correction / HARQ engine
- 50 Gbit/s of PCIe I/O
- 4-8x VSPA3-16@ < 640 MHz (=1.3 TFLOP)
- Floating point SIMD compute, 32 CMAC HP /clock
- 2 MB on-chip SRAM
Documentation
Quick reference to our documentation types.
1-5 of 12 documents
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Data Sheet
SuperSpeed USB 3.0 redriver
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Data Sheet
LS1046A, LS1026A Data Sheet
12 documents
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Data Sheet
SuperSpeed USB 3.0 redriver
-
Data Sheet
LS1046A, LS1026A Data Sheet
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Data Sheet
High speed differential 1-to-2 switch chip
