32-Bit Arm® Cortex®-M4 + 2 X M0 MCU; 282 KB SRAM; Ethernet; Two HS USBs; 80 Msps 12-Bit ADC; Configurable Peripherals, AES Engine

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Product Details

Features

  • Main Cortex-M4 processor
    • Arm Cortex-M4 processor, running at frequencies of up to 204 MHz.
    • Built-in Memory Protection Unit (MPU) supporting eight regions.
    • Built-in Nested Vectored Interrupt Controller (NVIC).
    • Hardware floating-point unit.
    • Non-maskable Interrupt (NMI) input.
    • JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch points.
    • Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
    • System tick timer.
  • Cortex-M0 coprocessor
    • Arm Cortex-M0 coprocessor capable of off-loading the main Arm Cortex-M4 processor.
    • Running at frequencies of up to 204 MHz.
    • JTAG and built-in NVIC.
  • Cortex-M0 subsystem
    • Arm Cortex-M0 processor controlling the SPI and SGPIO peripherals residing on a separate AHB multilayer matrix with direct access to 2 kB + 16 kB of SRAM.
    • Running at frequencies of up to 204 MHz.
    • Connected via a core-to-core bridge to the main AHB multilayer matrix and the main Arm Cortex-M4 processor.
    • JTAG and built-in NVIC.
  • On-chip memory
    • 264 kB SRAM for code and data use on the main AHB multilayer matrix plus 18 kB of SRAM on the Cortex-M0 subsystem.
    • Multiple SRAM blocks with separate bus access. Two SRAM blocks can be powered down individually.
    • 64 kB ROM containing boot code and on-chip software drivers.
    • 64-bit of One-Time Programmable (OTP) memory for general-purpose use.
    • Two banks (256 bit total) One-Time Programmable (OTP) memory for AES key storage. One bank can store an encrypted key for decoding the boot image.
  • AES engine for encryption and decryption of the boot image and data with DMA support and programmable via a ROM-based API.
  • Configurable digital peripherals
    • Serial GPIO (SGPIO) interface.
    • State Configurable Timer (SCT) subsystem on AHB.
    • Global Input Multiplexer Array (GIMA) allows to cross-connect multiple inputs and outputs to event driven peripherals like the timers, SCT, and ADC0/1.
  • Serial interfaces
    • Quad SPI Flash Interface (SPIFI) with four lanes and up to 52 MB per second.
    • 10/100T Ethernet MAC with RMII and MII interfaces and DMA support for high throughput at low CPU load. Support for IEEE 1588 time stamping/advanced time stamping (IEEE 1588-2008 v2).
    • One High-speed USB 2.0 Host/Device/OTG interface with DMA support and on-chip high-speed PHY.
    • One High-speed USB 2.0 Host/Device interface with DMA support, on-chip full-speed PHY and ULPI interface to external high-speed PHY.
    • USB interface electrical test software included in ROM USB stack.
    • One 550 UART with DMA support and full modem interface.
    • Three 550 USARTs with DMA and synchronous mode support and a smart card interface conforming to ISO7816 specification. One USART with IrDA interface.
    • Two C_CAN 2.0B controllers with one channel each. Use of C_CAN controller excludes operation of all other peripherals connected to the same bus bridge.
    • Two SSP controllers with FIFO and multi-protocol support. Both SSPs with DMA support.
    • One SPI controller.
    • One Fast-mode Plus I²C-bus interface with monitor mode and with open-drain I/O pins conforming to the full I²C-bus specification. Supports data rates of up to 1 Mbit/s.
    • One standard I²C-bus interface with monitor mode and with standard I/O pins.
    • Two I²S interfaces, each with DMA support and with one input and one output.
  • Digital peripherals
    • External Memory Controller (EMC) supporting external SRAM, ROM, NOR flash, and SDRAM devices.
    • LCD controller with DMA support and a programmable display resolution of up to 1024 H x 768 V. Supports monochrome and color STN panels and TFT color panels; supports 1/2/4/8 bpp Color Look-Up Table (CLUT) and 16/24-bit direct pixel mapping.
    • Secure Digital Input Output (SD/MMC) card interface.
    • Eight-channel General-Purpose DMA (GPDMA) controller can access all memories on the AHB and all DMA-capable AHB followers
    • 164 General-Purpose Input/Output (GPIO) pins with configurable pull-up/pull-down resistors and open-drain mode.
    • GPIO registers are located on the AHB for fast access. GPIO ports have DMA support.
    • Up to eight GPIO pins can be selected from all GPIO pins as edge and level sensitive interrupt sources.
    • Two GPIO group interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins.
    • Four general-purpose timer/counters with capture and match capabilities.
    • One motor control Pulse Width Modulator (PWM) for three-phase motor control.
    • One Quadrature Encoder Interface (QEI).
    • Repetitive Interrupt timer (RI timer).
    • Windowed watchdog timer (WWDT).
    • Ultra-low power Real-Time Clock (RTC) on separate power domain with 256 bytes of battery powered backup registers.
    • Alarm timer; can be battery powered.
  • Analog peripherals
    • One 10-bit DAC with DMA support and a data conversion rate of 400 kSamples/s. LBGA256 package only.
    • Two 8-channel, 10-bit ADCs (ADC0/1) with DMA support and a data conversion rate of 400 kSamples/s for a total of 16 independent channels. The 10-bit ADCs are only available on the LBGA256 package.
    • One 6-channel, 12-bit high-speed ADC (ADCHS) with DMA support and a data conversion rate of 80 MSamples/s.
  • Unique ID for each device.
  • Clock generation unit
    • Crystal oscillator with an operating range of 1 MHz to 25 MHz.
    • 12 MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy over temperature and voltage.
    • Ultra-low power Real-Time Clock (RTC) crystal oscillator.
    • Three PLLs allow CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. The second PLL is dedicated to the High-speed USB, the third PLL can be used as audio PLL.
    • Clock output.
  • Power
    • Single 3.3 V (2.2 V to 3.6 V) power supply with on-chip DC-to-DC converter for the core supply and the RTC power domain.
    • RTC power domain can be powered separately by a 3 V battery supply.
    • Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
    • Processor wake-up from Sleep mode via wake-up interrupts from various peripherals.
    • Wake-up from Deep-sleep, Power-down, and Deep power-down modes via external interrupts and interrupts generated by battery powered blocks in the RTC power domain.
    • Brownout detect with four separate thresholds for interrupt and forced reset.
    • Power-On Reset (POR).
    • Available as LBGA256 package.

Target Applications

  • Secure industrial gateways
  • Automotive aftermarket, including telematics
  • Smart meters
  • Industrial controls
  • Industrial automation
  • Diagnostic equipment
  • White goods HMI
  • Data collectors and navigation
  • Electronic instruments

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N true 0 PSPLPC43S70FET256en 12 Application Note Application Note t789 5 Data Sheet Data Sheet t520 1 Errata Errata t522 1 Fact Sheet Fact Sheet t523 1 Package Information Package Information t790 1 Training Presentation Training Presentation t878 1 User Guide User Guide t792 2 en_US en_US en Data Sheet Data Sheet 1 1 1.3 English 1442059091678743825654 PSP 7.1 MB None None documents None 1442059091678743825654 /docs/en/data-sheet/LPC43S70.pdf 7088762 /docs/en/data-sheet/LPC43S70.pdf LPC43S70 documents N N 2016-03-16 32-bit Arm<sup>®</sup> Cortex<sup>®</sup>-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine /docs/en/data-sheet/LPC43S70.pdf /docs/en/data-sheet/LPC43S70.pdf Data Sheet N 980000996212993340 2022-12-07 pdf N en Mar 15, 2016 980000996212993340 Data Sheet Y N 32-bit Arm<sup>®</sup> Cortex<sup>®</sup>-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine Application Note Application Note 5 2 1.0 English This technical note describes the history of USBD ROM device driver stack, the differences between LPC4300/LPC1800 series and the rest of the MCUs with USB controller, releases of the 1531319964919730710290 PSP 8.6 MB None None documents None 1531319964919730710290 /docs/en/application-note/TN00041.zip 8564695 /docs/en/application-note/TN00041.zip TN00041 documents N N 2018-07-11 USBD Library for LPC4300/LPC1800 series MCUs /docs/en/application-note/TN00041.zip /docs/en/application-note/TN00041.zip Application Note N 645036621402383989 2022-12-07 zip N en Jul 9, 2018 645036621402383989 Application Note Y N USBD Library for LPC4300/LPC1800 series MCUs 3 1 English 1503441357825705814050 PSP 3.2 MB None None documents None 1503441357825705814050 /docs/en/nxp/application-notes/AN12027.zip 3220460 /docs/en/nxp/application-notes/AN12027.zip AN12027 documents N N 2017-08-22 Connecting TFT LCD with LCD controller of LPC MCU /docs/en/nxp/application-notes/AN12027.zip /docs/en/nxp/application-notes/AN12027.zip Application Note N 645036621402383989 2024-12-03 zip N en Aug 22, 2017 645036621402383989 Application Note Y N Connecting TFT LCD with LCD controller of LPC MCU 4 1.0 English 1442088861363730103268 PSP 101.4 MB None None documents None 1442088861363730103268 /docs/en/application-note/AN11643.zip 101379967 /docs/en/application-note/AN11643.zip AN11643 documents N N 2016-08-08 LPC18S/43S00, LPC18/4300 Random Number Generator /docs/en/application-note/AN11643.zip /docs/en/application-note/AN11643.zip Application Note N 645036621402383989 2022-12-07 zip N en Aug 8, 2016 645036621402383989 Application Note Y N LPC18S/43S00, LPC18/4300 Random Number Generator 5 1.1 English 1442088466676695913457 PSP 1.0 MB None None documents None 1442088466676695913457 /docs/en/application-note/AN11648.zip 1022078 /docs/en/application-note/AN11648.zip AN11648 documents N N 2015-02-26 LPC18Sxx/43Sxx Secure Boot from QSPI Device /docs/en/application-note/AN11648.zip /docs/en/application-note/AN11648.zip Application Note N 645036621402383989 2022-12-07 zip N en Feb 26, 2015 645036621402383989 Application Note Y N LPC18Sxx/43Sxx Secure Boot from QSPI Device 6 1.0 English 1442089096928718181840 PSP 9.9 MB None None documents None 1442089096928718181840 /docs/en/application-note/AN11649.zip 9894781 /docs/en/application-note/AN11649.zip AN11649 documents N N 2015-02-23 LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark /docs/en/application-note/AN11649.zip /docs/en/application-note/AN11649.zip Application Note N 645036621402383989 2022-12-07 zip N en Feb 23, 2015 645036621402383989 Application Note Y N LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark User Guide User Guide 2 7 2.5 English The LPC43xx/LPC43Sxx are Arm Cortex-M4 based micro-controllers for embedded applications which include an Arm Cortex-M0 co-processor, up to 1 MB of flash, up to 264 kB of SRAM, and operate at CPU frequencies of up to 204 MHz. 1442125667541707618959 PSP 13.6 MB Registration without Disclaimer None documents Extended 1442125667541707618959 /secured/assets/documents/en/user-guide/UM10503.pdf 13616480 /secured/assets/documents/en/user-guide/UM10503.pdf UM10503 documents Y N 2017-07-27 LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller /webapp/Download?colCode=UM10503 /secured/assets/documents/en/user-guide/UM10503.pdf User Guide N 132339537837198660 2023-06-18 pdf Y en Sep 13, 2019 132339537837198660 User Guide Y N LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller 8 3.1 English The LPC18xx are Arm Cortex-M3 based microcontrollers for embedded applications. The LPC18xx include up to 200 kB of on-chip SRAM data memory (flashless parts) or up to 136 kB of on-chip SRAM and up to 1 MB of flash (parts with on-chip flash), and running at frequencies of up to 180 MHz. 1442125404931700322438 PSP 11.9 MB Registration without Disclaimer None documents Extended 1442125404931700322438 /secured/assets/documents/en/user-guide/UM10430.pdf 11876375 /secured/assets/documents/en/user-guide/UM10430.pdf UM10430 documents Y N 2017-07-27 LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller /webapp/Download?colCode=UM10430 /secured/assets/documents/en/user-guide/UM10430.pdf User Guide N 132339537837198660 2023-06-18 pdf Y en Sep 13, 2019 132339537837198660 User Guide Y N LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller Errata Errata 1 9 1.8 English This errata sheet describes both the known functional problems and any deviations from the electrical specifications known at the release date of this document. 1442123789079708968788 PSP 1.3 MB None None documents None 1442123789079708968788 /docs/en/errata/ES_LPC43SX0.pdf 1300662 /docs/en/errata/ES_LPC43SX0.pdf ES_LPC43SX0 documents N N 2018-03-08 Errata sheet LPC43S50, LPC43S30, LPC43S20 /docs/en/errata/ES_LPC43SX0.pdf /docs/en/errata/ES_LPC43SX0.pdf Errata N 155452329886410597 2022-12-07 pdf N en Feb 5, 2020 155452329886410597 Errata Y N Errata sheet LPC43S50, LPC43S30, LPC43S20 Fact Sheet Fact Sheet 1 10 1.0 English 1469853565632717846735 PSP 952.0 KB None None documents None 1469853565632717846735 /docs/en/fact-sheet/LPC43SXXLF.pdf 952000 /docs/en/fact-sheet/LPC43SXXLF.pdf LPC43SXXLF documents N N 2016-07-29 LPC43Sxx Series of MCUs - Fact Sheet /docs/en/fact-sheet/LPC43SXXLF.pdf /docs/en/fact-sheet/LPC43SXXLF.pdf Fact Sheet N 736675474163315314 2022-12-07 pdf N en Jul 27, 2016 736675474163315314 Fact Sheet Y N LPC43Sxx Series of MCUs - Fact Sheet Package Information Package Information 1 11 1.0 English 1455079404785712774996 PSP 644.0 KB None None documents None 1455079404785712774996 /docs/en/package-information/SOT740-2.pdf 644000 /docs/en/package-information/SOT740-2.pdf SOT740-2 documents N 2016-02-09 plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1 mm /docs/en/package-information/SOT740-2.pdf /docs/en/package-information/SOT740-2.pdf Package Information N 302435339416912908 2022-12-07 pdf en Feb 8, 2016 302435339416912908 Package Information Y N plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1 mm Training Presentation Training Presentation 1 12 1.1 English 1448047688178696399940 PSP 213.7 KB None None documents None 1448047688178696399940 /docs/en/supporting-information/R_10076.pdf 213731 /docs/en/supporting-information/R_10076.pdf R_10076 documents N N 2016-07-07 Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals /docs/en/supporting-information/R_10076.pdf /docs/en/supporting-information/R_10076.pdf Training Presentation N 501713016990820713 2022-12-07 pdf N en Nov 27, 2015 501713016990820713 Training Presentation Y N Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals false 0 LPC43S70FET256 downloads en true 1 Y PSP Y Y Application Note 5 /docs/en/application-note/TN00041.zip 2018-07-11 1531319964919730710290 PSP 2 Jul 9, 2018 Application Note This technical note describes the history of USBD ROM device driver stack, the differences between LPC4300/LPC1800 series and the rest of the MCUs with USB controller, releases of the None /docs/en/application-note/TN00041.zip English documents 8564695 None 645036621402383989 2022-12-07 N /docs/en/application-note/TN00041.zip USBD Library for LPC4300/LPC1800 series MCUs /docs/en/application-note/TN00041.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N USBD Library for LPC4300/LPC1800 series MCUs 8.6 MB TN00041 N 1531319964919730710290 /docs/en/nxp/application-notes/AN12027.zip 2017-08-22 1503441357825705814050 PSP 3 Aug 22, 2017 Application Note None /docs/en/nxp/application-notes/AN12027.zip English documents 3220460 None 645036621402383989 2024-12-03 N /docs/en/nxp/application-notes/AN12027.zip Connecting TFT LCD with LCD controller of LPC MCU /docs/en/nxp/application-notes/AN12027.zip documents 645036621402383989 Application Note N en None Y zip 1 N N Connecting TFT LCD with LCD controller of LPC MCU 3.2 MB AN12027 N 1503441357825705814050 /docs/en/application-note/AN11643.zip 2016-08-08 1442088861363730103268 PSP 4 Aug 8, 2016 Application Note None /docs/en/application-note/AN11643.zip English documents 101379967 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11643.zip LPC18S/43S00, LPC18/4300 Random Number Generator /docs/en/application-note/AN11643.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC18S/43S00, LPC18/4300 Random Number Generator 101.4 MB AN11643 N 1442088861363730103268 /docs/en/application-note/AN11648.zip 2015-02-26 1442088466676695913457 PSP 5 Feb 26, 2015 Application Note None /docs/en/application-note/AN11648.zip English documents 1022078 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11648.zip LPC18Sxx/43Sxx Secure Boot from QSPI Device /docs/en/application-note/AN11648.zip documents 645036621402383989 Application Note N en None Y zip 1.1 N N LPC18Sxx/43Sxx Secure Boot from QSPI Device 1.0 MB AN11648 N 1442088466676695913457 /docs/en/application-note/AN11649.zip 2015-02-23 1442089096928718181840 PSP 6 Feb 23, 2015 Application Note None /docs/en/application-note/AN11649.zip English documents 9894781 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11649.zip LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark /docs/en/application-note/AN11649.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark 9.9 MB AN11649 N 1442089096928718181840 Data Sheet 1 /docs/en/data-sheet/LPC43S70.pdf 2016-03-16 1442059091678743825654 PSP 1 Mar 15, 2016 Data Sheet None /docs/en/data-sheet/LPC43S70.pdf English documents 7088762 None 980000996212993340 2022-12-07 N /docs/en/data-sheet/LPC43S70.pdf 32-bit Arm<sup>®</sup> Cortex<sup>®</sup>-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine /docs/en/data-sheet/LPC43S70.pdf documents 980000996212993340 Data Sheet N en None Y pdf 1.3 N N 32-bit Arm<sup>®</sup> Cortex<sup>®</sup>-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine 7.1 MB LPC43S70 N 1442059091678743825654 Errata 1 /docs/en/errata/ES_LPC43SX0.pdf 2018-03-08 1442123789079708968788 PSP 9 Feb 5, 2020 Errata This errata sheet describes both the known functional problems and any deviations from the electrical specifications known at the release date of this document. None /docs/en/errata/ES_LPC43SX0.pdf English documents 1300662 None 155452329886410597 2022-12-07 N /docs/en/errata/ES_LPC43SX0.pdf Errata sheet LPC43S50, LPC43S30, LPC43S20 /docs/en/errata/ES_LPC43SX0.pdf documents 155452329886410597 Errata N en None Y pdf 1.8 N N Errata sheet LPC43S50, LPC43S30, LPC43S20 1.3 MB ES_LPC43SX0 N 1442123789079708968788 Fact Sheet 1 /docs/en/fact-sheet/LPC43SXXLF.pdf 2016-07-29 1469853565632717846735 PSP 10 Jul 27, 2016 Fact Sheet None /docs/en/fact-sheet/LPC43SXXLF.pdf English documents 952000 None 736675474163315314 2022-12-07 N /docs/en/fact-sheet/LPC43SXXLF.pdf LPC43Sxx Series of MCUs - Fact Sheet /docs/en/fact-sheet/LPC43SXXLF.pdf documents 736675474163315314 Fact Sheet N en None Y pdf 1.0 N N LPC43Sxx Series of MCUs - Fact Sheet 952.0 KB LPC43SXXLF N 1469853565632717846735 Package Information 1 /docs/en/package-information/SOT740-2.pdf 2016-02-09 1455079404785712774996 PSP 11 Feb 8, 2016 Package Information None /docs/en/package-information/SOT740-2.pdf English documents 644000 None 302435339416912908 2022-12-07 /docs/en/package-information/SOT740-2.pdf plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1 mm /docs/en/package-information/SOT740-2.pdf documents 302435339416912908 Package Information N en None Y pdf 1.0 N plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1 mm 644.0 KB SOT740-2 N 1455079404785712774996 Training Presentation 1 /docs/en/supporting-information/R_10076.pdf 2016-07-07 1448047688178696399940 PSP 12 Nov 27, 2015 Training Presentation None /docs/en/supporting-information/R_10076.pdf English documents 213731 None 501713016990820713 2022-12-07 N /docs/en/supporting-information/R_10076.pdf Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals /docs/en/supporting-information/R_10076.pdf documents 501713016990820713 Training Presentation N en None Y pdf 1.1 N N Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals 213.7 KB R_10076 N 1448047688178696399940 User Guide 2 /secured/assets/documents/en/user-guide/UM10503.pdf 2017-07-27 1442125667541707618959 PSP 7 Sep 13, 2019 User Guide The LPC43xx/LPC43Sxx are Arm Cortex-M4 based micro-controllers for embedded applications which include an Arm Cortex-M0 co-processor, up to 1 MB of flash, up to 264 kB of SRAM, and operate at CPU frequencies of up to 204 MHz. Registration without Disclaimer /secured/assets/documents/en/user-guide/UM10503.pdf English documents 13616480 None 132339537837198660 2023-06-18 Y /webapp/Download?colCode=UM10503 LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller /secured/assets/documents/en/user-guide/UM10503.pdf documents 132339537837198660 User Guide N en Extended Y pdf 2.5 Y N LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller 13.6 MB UM10503 N 1442125667541707618959 /secured/assets/documents/en/user-guide/UM10430.pdf 2017-07-27 1442125404931700322438 PSP 8 Sep 13, 2019 User Guide The LPC18xx are Arm Cortex-M3 based microcontrollers for embedded applications. The LPC18xx include up to 200 kB of on-chip SRAM data memory (flashless parts) or up to 136 kB of on-chip SRAM and up to 1 MB of flash (parts with on-chip flash), and running at frequencies of up to 180 MHz. Registration without Disclaimer /secured/assets/documents/en/user-guide/UM10430.pdf English documents 11876375 None 132339537837198660 2023-06-18 Y /webapp/Download?colCode=UM10430 LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller /secured/assets/documents/en/user-guide/UM10430.pdf documents 132339537837198660 User Guide N en Extended Y pdf 3.1 Y N LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller 11.9 MB UM10430 N 1442125404931700322438 true Y Products

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