The LPC43S57JET256 is a Arm Cortex-M4 based microcontroller for embedded
applications which includes an Arm Cortex-M0 coprocessor, 1 MB of flash and
136 kB of on-chip SRAM, 16 kB of EEPROM memory, security features with AES engine,
a quad SPI Flash Interface (SPIFI), advanced configurable peripherals such as the State
Configurable Timer (SCT) and the Serial General Purpose I/O (SGPIO) interface, two
High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple
digital and analog peripherals. The LPC43S57JET256 operates at CPU frequencies of up to
204 MHz.
The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level of support block integration. The
Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals, and
includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A
hardware floating-point unit is integrated in the core. The Arm Cortex-M4 with
floating-point unit is often referred to as M4F.
The Arm Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which
is upward code- and tool-compatible with the Cortex-M4 core. The Cortex-M0
coprocessor, designed as a replacement for existing 8/16-bit microcontrollers, offers up to
204 MHz performance with a simple instruction set and reduced code size.