16-Bit Automotive Microcontroller

68HC912B32 Not Recommended for New Designs
  • This page contains information on a product that is not recommended for new designs.
The MC68HC912B32 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (CPU12), 32-Kbyte flash EEPROM, 1-Kbyte RAM, 768-byte EEPROM, an asynchronous serial communications interface (SCI), a serial peripheral inter-face (SPI), an 8-channel timer and 16-bit pulse accumulator, a 10-bit analog-to-digital converter (ADC), a four-channel pulse-width modulator (PWM), and a J1850-compatible byte data link communications module (BDLC). The chip is the first 16-bit microcontroller to include both byte-erasable EEPROM and flash EEPROM on the same device. System resource mapping, clock generation, interrupt control and bus interfacing are managed by the Lite integration module (LIM). The MC68HC912B32 has full 16-bit data paths throughout, however, the multiplexed external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems.

Product Details

Block Diagram

Washer Machines Microcontrollers for M68HC05 Family Block Diagram

Washer Machines Microcontrollers for M68HC05 Family Block Diagram
Get diagram PDF

Features

  • 16-Bit CPU12
    • Upward Compatible with M68HC11 Instruction Set
    • Interrupt Stacking and Programmer's Model Identical to M68HC11
    • 20-Bit ALU
    • Instruction Queue
    • Enhanced Indexed Addressing
    • Fuzzy Logic Instructions
  • Multiplexed Bus
    • Single Chip or Expanded
    • 16/16 Wide or 16/8 Narrow Modes

Buy/Parametrics

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N true 0 PSP68HC912B32en 39 Application Note Application Note t789 27 Application Note Software Application Note Software t783 1 Data Sheet Data Sheet t520 1 Errata Errata t522 4 Product Numbering Scheme Product Numbering Scheme t524 1 Reference Manual Reference Manual t877 2 Technical Notes Technical Notes t521 3 en_US 0 false en_US en Data Sheet Data Sheet 1 1 9.1 English The MC68HC912B32, MC68HC12BE32 and MC68HC(9)12BC32, are 16-bit microcontroller units (MCUs) composed of standard on-chip peripherals. The multiplexed external bus can also operate in an 8-bit narrow mode for interfacing with single 8-bit wide memory in lower-cost systems. Y966576647528 PSP 2.0 MB None None documents None Y966576647528 /docs/en/data-sheet/M68HC12B.pdf 1989315 /docs/en/data-sheet/M68HC12B.pdf M68HC12B documents N 2000-08-17 M68HC12B Family - Data Sheet /docs/en/data-sheet/M68HC12B.pdf /docs/en/data-sheet/M68HC12B.pdf Data Sheet N 980000996212993340 2022-12-07 pdf en Jul 1, 2005 980000996212993340 Data Sheet Y N M68HC12B Family - Data Sheet Reference Manual Reference Manual 2 2 4 English This manual describes the features and operation of the core (central processing unit, or CPU, and development support functions) used in all M68HC12 and HCS12 microcontrollers. The CPU12 is a high-speed, 16-bit processing unit that has a programming model identical to that of the industry standard M68HC11 central processor unit (CPU). The CPU12 instruction set is a proper superset of the M68HC11 instruction set. O966576741768 PSP 3.5 MB Registration without Disclaimer None documents Extended O966576741768 /secured/assets/documents/en/reference-manual/CPU12RM.pdf 3476085 /secured/assets/documents/en/reference-manual/CPU12RM.pdf CPU12RM documents Y N 2016-10-31 CPU12 - Reference Manual /webapp/Download?colCode=CPU12RM /secured/assets/documents/en/reference-manual/CPU12RM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Mar 30, 2006 500633505221135046 Reference Manual Y N CPU12 - Reference Manual 3 2 English CPU12 Reference Guide A966576739154 PSP 1.3 MB Registration without Disclaimer None documents Extended A966576739154 /secured/assets/documents/en/reference-manual/CPU12RG.pdf 1336997 /secured/assets/documents/en/reference-manual/CPU12RG.pdf CPU12RG documents Y N 2016-10-31 CPU12 Reference Guide /webapp/Download?colCode=CPU12RG /secured/assets/documents/en/reference-manual/CPU12RG.pdf Reference Manual N 500633505221135046 2023-06-18 pdf Y en Nov 26, 2001 500633505221135046 Reference Manual Y N CPU12 Reference Guide Application Note Application Note 27 4 1 Chinese R1029437274857zh PSP 1.8 MB None None documents None R1029437274857 /docs/zh/application-note/AN2321.pdf 1750349 /docs/zh/application-note/AN2321.pdf AN2321 documents N N 2016-10-31 Designing for Board Level Electromagnetic Compatibility /docs/zh/application-note/AN2321.pdf /docs/zh/application-note/AN2321.pdf Application Note N 645036621402383989 2022-12-07 zh 645036621402383989 Application Note N 电路板级的电磁兼容设计 1 English Designing for Board Level Electromagnetic Compatibility R1029437274857 PSP 1.8 MB None None documents None R1029437274857 /docs/en/application-note/AN2321.pdf 1750349 /docs/en/application-note/AN2321.pdf AN2321 documents N N 2016-10-31 Designing for Board Level Electromagnetic Compatibility /docs/en/application-note/AN2321.pdf /docs/en/application-note/AN2321.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 18, 2005 645036621402383989 Application Note Y N Designing for Board Level Electromagnetic Compatibility 5 4 English Discrete Products provide a complete solution for designing a low cost system for direct and accurate liquid level control using an ac powered pump or solenoid valve. This circuit approach which exclusively uses NXP semiconductor parts, incorporates a piezoresistive pressure sensor with on-chip temperature compensation and a new solid-state relay with an integrated power triac, to drive directly the liquid level control equipment from the domestic 110/220V 50/60 Hz ac main power line. N966580685759 PSP 285.7 KB None None documents None N966580685759 /docs/en/application-note/AN1516.pdf 285680 /docs/en/application-note/AN1516.pdf AN1516 documents N N 2016-10-31 AN1516 Liquid Level Control Using a Pressure Sensor /docs/en/application-note/AN1516.pdf /docs/en/application-note/AN1516.pdf Application Note N 645036621402383989 2022-12-07 pdf N en May 16, 2005 645036621402383989 Application Note Y N AN1516 Liquid Level Control Using a Pressure Sensor 6 0 English This application note will help users of analog-to-digital converters (ADC) understand common terminologies used in the electronics industry to define ADC operation and performance. There are many terms and parameters used to define the performance of ADCs. Included in this document are common definitions, numerical specifications, differences, and issues with the definitions. By understanding the terminology used to specify various ADC parameters. 10zHQHtb PSP 2.4 MB None None documents None 10zHQHtb /docs/en/application-note/AN2438.pdf 2415284 /docs/en/application-note/AN2438.pdf AN2438 documents N 2003-03-13 ADC Definitions and Specifications /docs/en/application-note/AN2438.pdf /docs/en/application-note/AN2438.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 21, 2003 645036621402383989 Application Note Y N ADC Definitions and Specifications 7 0 English This application note shows some circuits that can used to optically isolate input, output and bi-directional digital pins. Debug interfaces for the Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08 are also shown. L1032965782249 PSP 1.0 MB None None documents None L1032965782249 /docs/en/application-note/AN2342.pdf 1012457 /docs/en/application-note/AN2342.pdf AN2342 documents N 2002-09-25 Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers /docs/en/application-note/AN2342.pdf /docs/en/application-note/AN2342.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 25, 2002 645036621402383989 Application Note Y N Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers 8 1 English This document describes how to use the CAN to examine, modify or reprogram the memory contents of any MCU connected to the network from a single, easily accessible point within the system. Although a working example is shown for Our HC12 Flash memory, the principles discussed could be easily extended to any other Flash technology. S1013599410452 PSP 606.0 KB None None documents None S1013599410452 /docs/en/application-note/AN1828.pdf 606021 /docs/en/application-note/AN1828.pdf AN1828 documents N 2002-02-13 FLASH Programming Via CAN /docs/en/application-note/AN1828.pdf /docs/en/application-note/AN1828.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 13, 2002 645036621402383989 Application Note Y N FLASH Programming Via CAN 9 0 English The purpose of this paper is to describe the co-ordinated actions necessary to put a CAN application into a low power sleep mode such that it will wake-up in response to a specified stimulus. The description in this paper is based on the MC9S12D family of microcontrollers, however it also applies to the MC68HC08 and MC68HC12 microcontrollers that have an MSCAN module, albeit with slightly different register and register bit names. Q1013514667038 PSP 403.1 KB None None documents None Q1013514667038 /docs/en/application-note/AN2255.pdf 403136 /docs/en/application-note/AN2255.pdf AN2255 documents N 2002-02-12 MSCAN Low-Power Applications /docs/en/application-note/AN2255.pdf /docs/en/application-note/AN2255.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 11, 2002 645036621402383989 Application Note Y N MSCAN Low-Power Applications 10 0 English This application note describes the basic operation of the background debug mode (BDM) and some of its applications, as it relates to Our M68HC12 Family of microcontrollers (MCU). Examples of in-circuit programming of internal FLASH memory and in-circuit debugging, using P&E Microcomputer Systems' BDM interface cable and its software, are also contained in this document. X989427477997 PSP 615.8 KB None None documents None X989427477997 /docs/en/application-note/AN2104.pdf 615791 /docs/en/application-note/AN2104.pdf AN2104 documents N 2001-05-09 Using Background Debug Mode for the M68HC12 Family /docs/en/application-note/AN2104.pdf /docs/en/application-note/AN2104.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 2, 2001 645036621402383989 Application Note Y N Using Background Debug Mode for the M68HC12 Family 11 0 English This application note describes a LIN demo that was designed for the SAE show in March 2000. The project was intended to demonstrate the LIN protocol, tools, and NXP products that were available. Although the demo is purely visual and does not represent any particular application, it does introduce many features that would be implemented in actual applications. C978120734892 PSP 1.7 MB None None documents None C978120734892 /docs/en/application-note/AN2103.pdf 1676151 /docs/en/application-note/AN2103.pdf AN2103 documents N N 2016-10-31 Local Interconnect Network (LIN) Demonstration /docs/en/application-note/AN2103.pdf /docs/en/application-note/AN2103.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Dec 1, 2000 645036621402383989 Application Note Y N Local Interconnect Network (LIN) Demonstration 12 0 English This application note describes the three major FLASH EEPROM technologies currently found in the M68HC12, M68HC08, M68HC3xx, and MPC microcontrollers. An explanation of the key characteristics of these memories is provided and the features that enable certain characteristics such as high density and low-power operation. Nonvolatile memory also presents a broad array of new terms to describe EPROM or byte erasable EEPROM memories. P967833968545 PSP 1.2 MB None None documents None P967833968545 /docs/en/application-note/AN1837.pdf 1214970 /docs/en/application-note/AN1837.pdf AN1837 documents N 2000-09-01 Non-Volatile Memory Technology Overview /docs/en/application-note/AN1837.pdf /docs/en/application-note/AN1837.pdf Application Note N 645036621402383989 2022-12-07 pdf en Mar 27, 2000 645036621402383989 Application Note Y N Non-Volatile Memory Technology Overview 13 0 English The operating speed of present HCMOS devices is approaching that of the fastest bipolar logic families of only a few years ago. Associated with this increase in performance are some new design challenges for the MCU-based system designer. Y967833878334 PSP 456.1 KB None None documents None Y967833878334 /docs/en/application-note/AN1050.pdf 456108 /docs/en/application-note/AN1050.pdf AN1050 documents N N 2016-10-31 Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers /docs/en/application-note/AN1050.pdf /docs/en/application-note/AN1050.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 2000 645036621402383989 Application Note Y N Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers 14 0 English AN1836SW.zip /secured/assets/documents/en/application-note-software/AN1836SW.zip /webapp/Download?colCode=AN1836SW&appType=license&docLang=en This document outlines basic routines that demonstrate how to program and erase FLASH EEPROM on the MC68HC912 Family of microcontrollers (MCU) through the background debug mode (BDM) interface using an NXP serial debug interface (SDIL) and the SDBUG12 software (version 2.15) from P&E Microcomputer Systems, Inc. SDBUG12 is a software interface tool to the SDIL hardware, which allows for background monitoring of the M68HC12 Family of MCUs. Q966576639694 PSP 1.5 MB None None documents None Q966576639694 /docs/en/application-note/AN1836.pdf 1495500 /docs/en/application-note/AN1836.pdf AN1836 documents N 2000-08-17 FLASH Programming for MC68HC912 Microcontrollers /docs/en/application-note/AN1836.pdf /docs/en/application-note/AN1836.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 2000 645036621402383989 Application Note Y N FLASH Programming for MC68HC912 Microcontrollers 15 0 English This application note provides an overview of the distributed systems interface (DSI) protocol and describes the hardware and software design of a demonstrator system. J966576637139 PSP 2.3 MB None None documents None J966576637139 /docs/en/application-note/AN1816.pdf 2267094 /docs/en/application-note/AN1816.pdf AN1816 documents N 2000-08-17 Using the HC912B32 to Implement the Distributed Systems Interface Protocol /docs/en/application-note/AN1816.pdf /docs/en/application-note/AN1816.pdf Application Note N 645036621402383989 2022-12-07 pdf en Aug 1, 1999 645036621402383989 Application Note Y N Using the HC912B32 to Implement the Distributed Systems Interface Protocol 16 1 English Many microcontrollers (MCUs) incorporate an inverting amplifier for use with an external crystal or ceramic resonator in a Pierce oscillator configuration. This paper describes how to calculate the minimum gain (transconductance) of the amplifier required to ensure oscillation with specific external components, and also how to measure the amplifier transconductance to establish whether the minimum gain requirement is met. O967833941140 PSP 362.3 KB None None documents None O967833941140 /docs/en/application-note/AN1783.pdf 362263 /docs/en/application-note/AN1783.pdf AN1783 documents N N 2016-10-31 Determining MCU Oscillator Start-Up Parameters /docs/en/application-note/AN1783.pdf /docs/en/application-note/AN1783.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1999 645036621402383989 Application Note Y N Determining MCU Oscillator Start-Up Parameters 17 1.0 English More and more applications are requiring liquid crystal displays (LCD) to communicate effectively to the outside world. This application note describes the hardware and software interface needed to display information from the MC68HC912B32. V966576634577 PSP 1.0 MB None None documents None V966576634577 /docs/en/application-note/AN1774.pdf 1003053 /docs/en/application-note/AN1774.pdf AN1774 documents N 2000-08-17 Interfacing the MC68HC912B32 to an LCD Module /docs/en/application-note/AN1774.pdf /docs/en/application-note/AN1774.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1999 645036621402383989 Application Note Y N Interfacing the MC68HC912B32 to an LCD Module 18 0 English This application note focuses on reduction techniques for electromagnetic interference. I966577944756 PSP 439.7 KB None None documents None I966577944756 /docs/en/application-note/AN1705.pdf 439712 /docs/en/application-note/AN1705.pdf AN1705 documents N N 2016-10-31 Noise Reduction Techniques for Microcontroller-Based Systems /docs/en/application-note/AN1705.pdf /docs/en/application-note/AN1705.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1999 645036621402383989 Application Note Y N Noise Reduction Techniques for Microcontroller-Based Systems 19 0 English Microcontroller-based applications can be delayed or jeopardized by reduced phase locked loop (PLL) performance. This poor performance is often associated with the design of the circuit board in which the microcontroller is installed. This application note describes common problems and suggests key practices to avoid PLL problems and performance degradation. V966577129851 PSP 557.6 KB None None documents None V966577129851 /docs/en/application-note/AN1282.pdf 557621 /docs/en/application-note/AN1282.pdf AN1282 documents N 2000-08-17 Board Strategies for Ensuring Optimum Frequency Synthesizer Performance /docs/en/application-note/AN1282.pdf /docs/en/application-note/AN1282.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1999 645036621402383989 Application Note N N Board Strategies for Ensuring Optimum Frequency Synthesizer Performance 20 0 English This application note presents basic tone synthesis techniques and illustrates their implementation using the HC08, HC05, HC11, and HC12 Families of MCUs. S967833928924 PSP 857.7 KB None None documents None S967833928924 /docs/en/application-note/AN1771.pdf 857671 /docs/en/application-note/AN1771.pdf AN1771 documents N N 2016-10-31 Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs /docs/en/application-note/AN1771.pdf /docs/en/application-note/AN1771.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1998 645036621402383989 Application Note Y N Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs 21 1 English This application note documents a method of extending digital input using the analog-to-digital converter of an MCU. S967833934540 PSP 459.0 KB None None documents None S967833934540 /docs/en/application-note/AN1775.pdf 458988 /docs/en/application-note/AN1775.pdf AN1775 documents N N 2016-10-31 Expanding Digital Input with an A/D Converter /docs/en/application-note/AN1775.pdf /docs/en/application-note/AN1775.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1998 645036621402383989 Application Note Y N Expanding Digital Input with an A/D Converter 22 0 English This application note primarily is intended to teach people about variable pulse width J1850 multiplexing and Our byte data link controller module. V966577487819 PSP 744.8 KB None None documents None V966577487819 /docs/en/application-note/AN1731.pdf 744771 /docs/en/application-note/AN1731.pdf AN1731 documents N N 2016-10-31 VPW J1850 Multiplexing and Byte Data Link Controller (BDLC) Module /docs/en/application-note/AN1731.pdf /docs/en/application-note/AN1731.pdf Application Note N 645036621402383989 2023-08-08 pdf N en Jan 1, 1998 645036621402383989 Application Note Y N VPW J1850 Multiplexing and Byte Data Link Controller (BDLC) Module 23 1 English Indexed indirect addressing (IIA) is an addressing mode infrequently found in CPU instruction sets. The IAA mode adds an additional level of indirection beyond standard indexed addressing modes. This application note presents some techniques for making the IIA mode more useful. The efficient instruction set and the addressing mode features of the M68HC12 allow it to compete effectively with RISC processors. D966576629437 PSP 386.6 KB None None documents None D966576629437 /docs/en/application-note/AN1716.pdf 386641 /docs/en/application-note/AN1716.pdf AN1716 documents N 2000-08-17 Using M68HC12 Indexed Indirect Addressing /docs/en/application-note/AN1716.pdf /docs/en/application-note/AN1716.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note Y N Using M68HC12 Indexed Indirect Addressing 24 0 English A systems development board for motion control that uses the MC68HC705MC4's pulse-width modulator is presented here. P966577184679 PSP 2.6 MB None None documents None P966577184679 /docs/en/application-note/AN1717.pdf 2611048 /docs/en/application-note/AN1717.pdf AN1717 documents N 2000-08-17 ITC127 MC68HC705MC4 Motion Control Development Board /docs/en/application-note/AN1717.pdf /docs/en/application-note/AN1717.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note N N ITC127 MC68HC705MC4 Motion Control Development Board 25 0 English A Serial Bootloader for Reprogramming the MC68HC912B32 FLASH EEPROM C966576632010 PSP 1.4 MB None None documents None C966576632010 /docs/en/application-note/AN1718.pdf 1392109 /docs/en/application-note/AN1718.pdf AN1718 documents N 2000-08-17 A Serial Bootloader for Reprogramming the MC68HC912B32 Flash EEPROM /docs/en/application-note/AN1718.pdf /docs/en/application-note/AN1718.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note Y N A Serial Bootloader for Reprogramming the MC68HC912B32 Flash EEPROM 26 0 English This application note provides the details necessary to utilize the D-Bug12 user-callable utility functions. Additionally, it shows how to substitute user interrupt service routines for D-Bug12's default exception handlers. A966576626834 PSP 1.1 MB None None documents None A966576626834 /docs/en/application-note/AN1280A.pdf 1137321 /docs/en/application-note/AN1280A.pdf AN1280A documents N 2000-08-17 Using the Callable Routines in D-Bug12 /docs/en/application-note/AN1280A.pdf /docs/en/application-note/AN1280A.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1997 645036621402383989 Application Note Y N Using the Callable Routines in D-Bug12 27 0 English In general, the CPU12 is a proper superset of the M68HC11 CPU. Significant changes have been made to improve the efficiency and capabilities of the CPU without sacrificing compatibility with the popular M68HC11 family. This note provides information that will allow the large number of programmers familiar with the M68HC11 to evaluate moving from an M68HC11 system to an M68HC12 system. V967156618397 PSP 1.7 MB None None documents None V967156618397 /docs/en/application-note/AN1284.pdf 1686279 /docs/en/application-note/AN1284.pdf AN1284 documents N 2000-08-24 Transporting M68HC11 Code to M68HC12 Devices /docs/en/application-note/AN1284.pdf /docs/en/application-note/AN1284.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1996 645036621402383989 Application Note N N Transporting M68HC11 Code to M68HC12 Devices 28 0 English Using and Extending D-Bug12 Routines A966576624312 PSP 613.3 KB None None documents None A966576624312 /docs/en/application-note/AN1280.pdf 613317 /docs/en/application-note/AN1280.pdf AN1280 documents N 2000-08-17 Using and Extending D-Bug12 Routines /docs/en/application-note/AN1280.pdf /docs/en/application-note/AN1280.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 1, 1996 645036621402383989 Application Note N N Using and Extending D-Bug12 Routines 29 0 English This application note discusses how to design a single-chip microcontroller application considering electromagnetic compatibility (EMC). O967833897694 PSP 283.9 KB None None documents None O967833897694 /docs/en/application-note/AN1263.pdf 283939 /docs/en/application-note/AN1263.pdf AN1263 documents N N 2016-10-31 Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers /docs/en/application-note/AN1263.pdf /docs/en/application-note/AN1263.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1995 645036621402383989 Application Note Y N Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers 30 0 English Focusing on utilizing proven layout techniques to control EMI on MCU-based mixed-signal systems. It provides a practical approach rather than a theoretical discussion. F967833892719 PSP 347.8 KB None None documents None F967833892719 /docs/en/application-note/AN1259.pdf 347790 /docs/en/application-note/AN1259.pdf AN1259 documents N N 2016-10-31 AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note /docs/en/application-note/AN1259.pdf /docs/en/application-note/AN1259.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 1, 1995 645036621402383989 Application Note Y N AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note Application Note Software Application Note Software 1 31 0 English Software files for AN1836 C1003531962734 PSP 146.9 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended C1003531962734 /secured/assets/documents/en/application-note-software/AN1836SW.zip 146927 /secured/assets/documents/en/application-note-software/AN1836SW.zip AN1836SW documents Y N 2016-10-31 Software files for AN1836 zipped /webapp/Download?colCode=AN1836SW&appType=license /secured/assets/documents/en/application-note-software/AN1836SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Feb 21, 2000 789425793691620447 Application Note Software N Software files for AN1836 zipped Technical Notes Technical Notes 3 32 0 English Engineering Bulletin C1024523882098 PSP 239.6 KB None None documents None C1024523882098 /docs/en/engineering-bulletin/EB396.pdf 239585 /docs/en/engineering-bulletin/EB396.pdf EB396 documents N N 2016-10-31 Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers /docs/en/engineering-bulletin/EB396.pdf /docs/en/engineering-bulletin/EB396.pdf Technical Notes N 389245547230346745 2022-12-07 pdf N en Jun 19, 2002 389245547230346745 Technical Notes Y N Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers 33 2 English This engineering bulletin compares some HC12 device functionality with the MC9S12DP256. P1004548463999 PSP 502.9 KB None None documents None P1004548463999 /docs/en/engineering-bulletin/EB376.pdf 502866 /docs/en/engineering-bulletin/EB376.pdf EB376 documents N 2001-10-31 A comparison of the MC9S12DP256 (mask set 0K36N) versus the HC12 /docs/en/engineering-bulletin/EB376.pdf /docs/en/engineering-bulletin/EB376.pdf Technical Notes N 389245547230346745 2022-12-07 pdf en Oct 31, 2001 389245547230346745 Technical Notes N N A comparison of the MC9S12DP256 (mask set 0K36N) versus the HC12 34 0 English Describes the basic process for initializing any node which uses an NXP microcontroller (MCU) with a byte data link controller (BDLC) module onto a J1850 network. Y1027964202640 PSP 256.0 KB None None documents None Y1027964202640 /docs/en/engineering-bulletin/EB601.pdf 256038 /docs/en/engineering-bulletin/EB601.pdf EB601 documents N 2002-07-29 Initializing a BDLC-Based SAE J1850 Node on a GM Class 2 or Chrysler PCI Network /docs/en/engineering-bulletin/EB601.pdf /docs/en/engineering-bulletin/EB601.pdf Technical Notes N 389245547230346745 2022-12-07 pdf en Jul 20, 2000 389245547230346745 Technical Notes Y N Initializing a BDLC-Based SAE J1850 Node on a GM Class 2 or Chrysler PCI Network Errata Errata 4 35 0 English This mask set errata provides information pertaining to the byte data link controller (BDLC) applicable to these 68HC912B32 MCU mask set devices: 4J54E, 3J54E, 0J54E, 0J64Y, 9H91F, 3H91F, 1H91F. X1002133386147 PSP 16.0 KB None None documents None X1002133386147 /docs/en/errata/68HC912B32MSE4.pdf 16016 /docs/en/errata/68HC912B32MSE4.pdf 68HC912B32MSE4 documents N 2001-10-03 68HC912B32 8-Bit Microcontroller Unit: Mask Set Errata 4 - Errata /docs/en/errata/68HC912B32MSE4.pdf /docs/en/errata/68HC912B32MSE4.pdf Errata N 155452329886410597 2022-12-07 pdf en Mar 15, 2001 155452329886410597 Errata Y N 68HC912B32 8-Bit Microcontroller Unit: Mask Set Errata 4 - Errata 36 2 English This errata provides information applicable to the following MCU mask set devices: 0J64Y. H983837667989 PSP 51.9 KB None None documents None H983837667989 /docs/en/errata/68HC912B32MSE3.pdf 51949 /docs/en/errata/68HC912B32MSE3.pdf 68HC912B32MSE3 documents N 2001-03-05 MC68HC912B32 Microcontroller Unit: Mask Set Errata 3 - Errata /docs/en/errata/68HC912B32MSE3.pdf /docs/en/errata/68HC912B32MSE3.pdf Errata N 155452329886410597 2022-12-07 pdf en Mar 1, 2001 155452329886410597 Errata Y N MC68HC912B32 Microcontroller Unit: Mask Set Errata 3 - Errata 37 1 English HC912B32 Device Information Sheet: 09H91F Mask Sets V966576692765 PSP 71.0 KB None None documents None V966576692765 /docs/en/errata/68HC912B32MSE1.pdf 71041 /docs/en/errata/68HC912B32MSE1.pdf 68HC912B32MSE1 documents N 2000-08-17 HC912B32 Device Information Sheet: 09H91F Mask Sets /docs/en/errata/68HC912B32MSE1.pdf /docs/en/errata/68HC912B32MSE1.pdf Errata N 155452329886410597 2022-12-07 pdf en Aug 18, 1999 155452329886410597 Errata N N HC912B32 Device Information Sheet: 09H91F Mask Sets 38 2 English HC912B32 Device Information Sheet: 04J54E Mask Sets O966576696164 PSP 34.3 KB None None documents None O966576696164 /docs/en/errata/68HC912B32MSE2.pdf 34308 /docs/en/errata/68HC912B32MSE2.pdf 68HC912B32MSE2 documents N 2000-08-17 HC912B32 Device Information Sheet: 04J54E Mask Sets /docs/en/errata/68HC912B32MSE2.pdf /docs/en/errata/68HC912B32MSE2.pdf Errata N 155452329886410597 2022-12-07 pdf en Aug 18, 1999 155452329886410597 Errata N N HC912B32 Device Information Sheet: 04J54E Mask Sets Product Numbering Scheme Product Numbering Scheme 1 39 0 English MC68HC912B Family Product Numbering Code Key, SG1006 Q3 2006 1132164313649710085964 PSP 43.6 KB None None documents None 1132164313649710085964 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf 43629 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf MC68HC912BPN documents N 2005-11-16 MC68HC912B Family Product Numbering Scheme SG1006 Q3 2006 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf /docs/en/product-numbering-scheme/MC68HC912BPN.pdf Product Numbering Scheme N 554336734861737620 2022-12-07 pdf en Nov 16, 2005 554336734861737620 Product Numbering Scheme Y N MC68HC912B Family Product Numbering Scheme SG1006 Q3 2006 false 0 68HC912B32 downloads en true 1 Y PSP Application Note 27 /docs/en/application-note/AN2321.pdf 2016-10-31 R1029437274857 PSP 4 Oct 18, 2005 Application Note Designing for Board Level Electromagnetic Compatibility None /docs/en/application-note/AN2321.pdf English documents 1750349 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2321.pdf Designing for Board Level Electromagnetic Compatibility /docs/en/application-note/AN2321.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Designing for Board Level Electromagnetic Compatibility 1.8 MB AN2321 N R1029437274857 /docs/en/application-note/AN1516.pdf 2016-10-31 N966580685759 PSP 5 May 16, 2005 Application Note Discrete Products provide a complete solution for designing a low cost system for direct and accurate liquid level control using an ac powered pump or solenoid valve. This circuit approach which exclusively uses NXP semiconductor parts, incorporates a piezoresistive pressure sensor with on-chip temperature compensation and a new solid-state relay with an integrated power triac, to drive directly the liquid level control equipment from the domestic 110/220V 50/60 Hz ac main power line. None /docs/en/application-note/AN1516.pdf English documents 285680 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1516.pdf AN1516 Liquid Level Control Using a Pressure Sensor /docs/en/application-note/AN1516.pdf documents 645036621402383989 Application Note N en None Y pdf 4 N N AN1516 Liquid Level Control Using a Pressure Sensor 285.7 KB AN1516 N N966580685759 /docs/en/application-note/AN2438.pdf 2003-03-13 10zHQHtb PSP 6 Feb 21, 2003 Application Note This application note will help users of analog-to-digital converters (ADC) understand common terminologies used in the electronics industry to define ADC operation and performance. There are many terms and parameters used to define the performance of ADCs. Included in this document are common definitions, numerical specifications, differences, and issues with the definitions. By understanding the terminology used to specify various ADC parameters. None /docs/en/application-note/AN2438.pdf English documents 2415284 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2438.pdf ADC Definitions and Specifications /docs/en/application-note/AN2438.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N ADC Definitions and Specifications 2.4 MB AN2438 N 10zHQHtb /docs/en/application-note/AN2342.pdf 2002-09-25 L1032965782249 PSP 7 Sep 25, 2002 Application Note This application note shows some circuits that can used to optically isolate input, output and bi-directional digital pins. Debug interfaces for the Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08 are also shown. None /docs/en/application-note/AN2342.pdf English documents 1012457 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2342.pdf Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers /docs/en/application-note/AN2342.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers 1.0 MB AN2342 N L1032965782249 /docs/en/application-note/AN1828.pdf 2002-02-13 S1013599410452 PSP 8 Feb 13, 2002 Application Note This document describes how to use the CAN to examine, modify or reprogram the memory contents of any MCU connected to the network from a single, easily accessible point within the system. Although a working example is shown for Our HC12 Flash memory, the principles discussed could be easily extended to any other Flash technology. None /docs/en/application-note/AN1828.pdf English documents 606021 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1828.pdf FLASH Programming Via CAN /docs/en/application-note/AN1828.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N FLASH Programming Via CAN 606.0 KB AN1828 N S1013599410452 /docs/en/application-note/AN2255.pdf 2002-02-12 Q1013514667038 PSP 9 Feb 11, 2002 Application Note The purpose of this paper is to describe the co-ordinated actions necessary to put a CAN application into a low power sleep mode such that it will wake-up in response to a specified stimulus. The description in this paper is based on the MC9S12D family of microcontrollers, however it also applies to the MC68HC08 and MC68HC12 microcontrollers that have an MSCAN module, albeit with slightly different register and register bit names. None /docs/en/application-note/AN2255.pdf English documents 403136 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2255.pdf MSCAN Low-Power Applications /docs/en/application-note/AN2255.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N MSCAN Low-Power Applications 403.1 KB AN2255 N Q1013514667038 /docs/en/application-note/AN2104.pdf 2001-05-09 X989427477997 PSP 10 Feb 2, 2001 Application Note This application note describes the basic operation of the background debug mode (BDM) and some of its applications, as it relates to Our M68HC12 Family of microcontrollers (MCU). Examples of in-circuit programming of internal FLASH memory and in-circuit debugging, using P&E Microcomputer Systems' BDM interface cable and its software, are also contained in this document. None /docs/en/application-note/AN2104.pdf English documents 615791 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2104.pdf Using Background Debug Mode for the M68HC12 Family /docs/en/application-note/AN2104.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using Background Debug Mode for the M68HC12 Family 615.8 KB AN2104 N X989427477997 /docs/en/application-note/AN2103.pdf 2016-10-31 C978120734892 PSP 11 Dec 1, 2000 Application Note This application note describes a LIN demo that was designed for the SAE show in March 2000. The project was intended to demonstrate the LIN protocol, tools, and NXP products that were available. Although the demo is purely visual and does not represent any particular application, it does introduce many features that would be implemented in actual applications. None /docs/en/application-note/AN2103.pdf English documents 1676151 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2103.pdf Local Interconnect Network (LIN) Demonstration /docs/en/application-note/AN2103.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Local Interconnect Network (LIN) Demonstration 1.7 MB AN2103 N C978120734892 /docs/en/application-note/AN1837.pdf 2000-09-01 P967833968545 PSP 12 Mar 27, 2000 Application Note This application note describes the three major FLASH EEPROM technologies currently found in the M68HC12, M68HC08, M68HC3xx, and MPC microcontrollers. An explanation of the key characteristics of these memories is provided and the features that enable certain characteristics such as high density and low-power operation. Nonvolatile memory also presents a broad array of new terms to describe EPROM or byte erasable EEPROM memories. None /docs/en/application-note/AN1837.pdf English documents 1214970 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1837.pdf Non-Volatile Memory Technology Overview /docs/en/application-note/AN1837.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Non-Volatile Memory Technology Overview 1.2 MB AN1837 N P967833968545 /docs/en/application-note/AN1050.pdf 2016-10-31 Y967833878334 PSP 13 Jan 1, 2000 Application Note The operating speed of present HCMOS devices is approaching that of the fastest bipolar logic families of only a few years ago. Associated with this increase in performance are some new design challenges for the MCU-based system designer. None /docs/en/application-note/AN1050.pdf English documents 456108 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1050.pdf Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers /docs/en/application-note/AN1050.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers 456.1 KB AN1050 N Y967833878334 /docs/en/application-note/AN1836.pdf 2000-08-17 Q966576639694 PSP 14 Jan 1, 2000 Application Note This document outlines basic routines that demonstrate how to program and erase FLASH EEPROM on the MC68HC912 Family of microcontrollers (MCU) through the background debug mode (BDM) interface using an NXP serial debug interface (SDIL) and the SDBUG12 software (version 2.15) from P&E Microcomputer Systems, Inc. SDBUG12 is a software interface tool to the SDIL hardware, which allows for background monitoring of the M68HC12 Family of MCUs. None /docs/en/application-note/AN1836.pdf English documents 1495500 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1836.pdf FLASH Programming for MC68HC912 Microcontrollers /docs/en/application-note/AN1836.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N FLASH Programming for MC68HC912 Microcontrollers 1.5 MB AN1836 N Q966576639694 /docs/en/application-note/AN1816.pdf 2000-08-17 J966576637139 PSP 15 Aug 1, 1999 Application Note This application note provides an overview of the distributed systems interface (DSI) protocol and describes the hardware and software design of a demonstrator system. None /docs/en/application-note/AN1816.pdf English documents 2267094 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1816.pdf Using the HC912B32 to Implement the Distributed Systems Interface Protocol /docs/en/application-note/AN1816.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the HC912B32 to Implement the Distributed Systems Interface Protocol 2.3 MB AN1816 N J966576637139 /docs/en/application-note/AN1783.pdf 2016-10-31 O967833941140 PSP 16 Jan 1, 1999 Application Note Many microcontrollers (MCUs) incorporate an inverting amplifier for use with an external crystal or ceramic resonator in a Pierce oscillator configuration. This paper describes how to calculate the minimum gain (transconductance) of the amplifier required to ensure oscillation with specific external components, and also how to measure the amplifier transconductance to establish whether the minimum gain requirement is met. None /docs/en/application-note/AN1783.pdf English documents 362263 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1783.pdf Determining MCU Oscillator Start-Up Parameters /docs/en/application-note/AN1783.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Determining MCU Oscillator Start-Up Parameters 362.3 KB AN1783 N O967833941140 /docs/en/application-note/AN1774.pdf 2000-08-17 V966576634577 PSP 17 Jan 1, 1999 Application Note More and more applications are requiring liquid crystal displays (LCD) to communicate effectively to the outside world. This application note describes the hardware and software interface needed to display information from the MC68HC912B32. None /docs/en/application-note/AN1774.pdf English documents 1003053 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1774.pdf Interfacing the MC68HC912B32 to an LCD Module /docs/en/application-note/AN1774.pdf documents 645036621402383989 Application Note N en None Y pdf 1.0 N Interfacing the MC68HC912B32 to an LCD Module 1.0 MB AN1774 N V966576634577 /docs/en/application-note/AN1705.pdf 2016-10-31 I966577944756 PSP 18 Jan 1, 1999 Application Note This application note focuses on reduction techniques for electromagnetic interference. None /docs/en/application-note/AN1705.pdf English documents 439712 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1705.pdf Noise Reduction Techniques for Microcontroller-Based Systems /docs/en/application-note/AN1705.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Noise Reduction Techniques for Microcontroller-Based Systems 439.7 KB AN1705 N I966577944756 /docs/en/application-note/AN1282.pdf 2000-08-17 V966577129851 PSP 19 Jan 1, 1999 Application Note Microcontroller-based applications can be delayed or jeopardized by reduced phase locked loop (PLL) performance. This poor performance is often associated with the design of the circuit board in which the microcontroller is installed. This application note describes common problems and suggests key practices to avoid PLL problems and performance degradation. None /docs/en/application-note/AN1282.pdf English documents 557621 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1282.pdf Board Strategies for Ensuring Optimum Frequency Synthesizer Performance /docs/en/application-note/AN1282.pdf documents 645036621402383989 Application Note N en None N pdf 0 N Board Strategies for Ensuring Optimum Frequency Synthesizer Performance 557.6 KB AN1282 N V966577129851 /docs/en/application-note/AN1771.pdf 2016-10-31 S967833928924 PSP 20 Jan 1, 1998 Application Note This application note presents basic tone synthesis techniques and illustrates their implementation using the HC08, HC05, HC11, and HC12 Families of MCUs. None /docs/en/application-note/AN1771.pdf English documents 857671 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1771.pdf Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs /docs/en/application-note/AN1771.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs 857.7 KB AN1771 N S967833928924 /docs/en/application-note/AN1775.pdf 2016-10-31 S967833934540 PSP 21 Jan 1, 1998 Application Note This application note documents a method of extending digital input using the analog-to-digital converter of an MCU. None /docs/en/application-note/AN1775.pdf English documents 458988 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1775.pdf Expanding Digital Input with an A/D Converter /docs/en/application-note/AN1775.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Expanding Digital Input with an A/D Converter 459.0 KB AN1775 N S967833934540 /docs/en/application-note/AN1731.pdf 2016-10-31 V966577487819 PSP 22 Jan 1, 1998 Application Note This application note primarily is intended to teach people about variable pulse width J1850 multiplexing and Our byte data link controller module. None /docs/en/application-note/AN1731.pdf English documents 744771 None 645036621402383989 2023-08-08 N /docs/en/application-note/AN1731.pdf VPW J1850 Multiplexing and Byte Data Link Controller (BDLC) Module /docs/en/application-note/AN1731.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N VPW J1850 Multiplexing and Byte Data Link Controller (BDLC) Module 744.8 KB AN1731 N V966577487819 /docs/en/application-note/AN1716.pdf 2000-08-17 D966576629437 PSP 23 Jan 1, 1997 Application Note Indexed indirect addressing (IIA) is an addressing mode infrequently found in CPU instruction sets. The IAA mode adds an additional level of indirection beyond standard indexed addressing modes. This application note presents some techniques for making the IIA mode more useful. The efficient instruction set and the addressing mode features of the M68HC12 allow it to compete effectively with RISC processors. None /docs/en/application-note/AN1716.pdf English documents 386641 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1716.pdf Using M68HC12 Indexed Indirect Addressing /docs/en/application-note/AN1716.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Using M68HC12 Indexed Indirect Addressing 386.6 KB AN1716 N D966576629437 /docs/en/application-note/AN1717.pdf 2000-08-17 P966577184679 PSP 24 Jan 1, 1997 Application Note A systems development board for motion control that uses the MC68HC705MC4's pulse-width modulator is presented here. None /docs/en/application-note/AN1717.pdf English documents 2611048 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1717.pdf ITC127 MC68HC705MC4 Motion Control Development Board /docs/en/application-note/AN1717.pdf documents 645036621402383989 Application Note N en None N pdf 0 N ITC127 MC68HC705MC4 Motion Control Development Board 2.6 MB AN1717 N P966577184679 /docs/en/application-note/AN1718.pdf 2000-08-17 C966576632010 PSP 25 Jan 1, 1997 Application Note A Serial Bootloader for Reprogramming the MC68HC912B32 FLASH EEPROM None /docs/en/application-note/AN1718.pdf English documents 1392109 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1718.pdf A Serial Bootloader for Reprogramming the MC68HC912B32 Flash EEPROM /docs/en/application-note/AN1718.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N A Serial Bootloader for Reprogramming the MC68HC912B32 Flash EEPROM 1.4 MB AN1718 N C966576632010 /docs/en/application-note/AN1280A.pdf 2000-08-17 A966576626834 PSP 26 Jan 1, 1997 Application Note This application note provides the details necessary to utilize the D-Bug12 user-callable utility functions. Additionally, it shows how to substitute user interrupt service routines for D-Bug12's default exception handlers. None /docs/en/application-note/AN1280A.pdf English documents 1137321 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1280A.pdf Using the Callable Routines in D-Bug12 /docs/en/application-note/AN1280A.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the Callable Routines in D-Bug12 1.1 MB AN1280A N A966576626834 /docs/en/application-note/AN1284.pdf 2000-08-24 V967156618397 PSP 27 Jan 1, 1996 Application Note In general, the CPU12 is a proper superset of the M68HC11 CPU. Significant changes have been made to improve the efficiency and capabilities of the CPU without sacrificing compatibility with the popular M68HC11 family. This note provides information that will allow the large number of programmers familiar with the M68HC11 to evaluate moving from an M68HC11 system to an M68HC12 system. None /docs/en/application-note/AN1284.pdf English documents 1686279 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1284.pdf Transporting M68HC11 Code to M68HC12 Devices /docs/en/application-note/AN1284.pdf documents 645036621402383989 Application Note N en None N pdf 0 N Transporting M68HC11 Code to M68HC12 Devices 1.7 MB AN1284 N V967156618397 /docs/en/application-note/AN1280.pdf 2000-08-17 A966576624312 PSP 28 Jan 1, 1996 Application Note Using and Extending D-Bug12 Routines None /docs/en/application-note/AN1280.pdf English documents 613317 None 645036621402383989 2022-12-07 /docs/en/application-note/AN1280.pdf Using and Extending D-Bug12 Routines /docs/en/application-note/AN1280.pdf documents 645036621402383989 Application Note N en None N pdf 0 N Using and Extending D-Bug12 Routines 613.3 KB AN1280 N A966576624312 /docs/en/application-note/AN1263.pdf 2016-10-31 O967833897694 PSP 29 Jan 1, 1995 Application Note This application note discusses how to design a single-chip microcontroller application considering electromagnetic compatibility (EMC). None /docs/en/application-note/AN1263.pdf English documents 283939 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1263.pdf Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers /docs/en/application-note/AN1263.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers 283.9 KB AN1263 N O967833897694 /docs/en/application-note/AN1259.pdf 2016-10-31 F967833892719 PSP 30 Jan 1, 1995 Application Note Focusing on utilizing proven layout techniques to control EMI on MCU-based mixed-signal systems. It provides a practical approach rather than a theoretical discussion. None /docs/en/application-note/AN1259.pdf English documents 347790 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN1259.pdf AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note /docs/en/application-note/AN1259.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN1259: System Design and Layout Techniques for Noise Reduction in MCU-Based Systems – Application Note 347.8 KB AN1259 N F967833892719 Application Note Software 1 /secured/assets/documents/en/application-note-software/AN1836SW.zip 2016-10-31 C1003531962734 PSP 31 Feb 21, 2000 Application Note Software Software files for AN1836 Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN1836SW.zip English documents 146927 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN1836SW&appType=license Software files for AN1836 zipped /secured/assets/documents/en/application-note-software/AN1836SW.zip documents 789425793691620447 Application Note Software N en Extended zip 0 Y N Software files for AN1836 zipped 146.9 KB AN1836SW N C1003531962734 Data Sheet 1 /docs/en/data-sheet/M68HC12B.pdf 2000-08-17 Y966576647528 PSP 1 Jul 1, 2005 Data Sheet The MC68HC912B32, MC68HC12BE32 and MC68HC(9)12BC32, are 16-bit microcontroller units (MCUs) composed of standard on-chip peripherals. The multiplexed external bus can also operate in an 8-bit narrow mode for interfacing with single 8-bit wide memory in lower-cost systems. None /docs/en/data-sheet/M68HC12B.pdf English documents 1989315 None 980000996212993340 2022-12-07 /docs/en/data-sheet/M68HC12B.pdf M68HC12B Family - Data Sheet /docs/en/data-sheet/M68HC12B.pdf documents 980000996212993340 Data Sheet N en None Y pdf 9.1 N M68HC12B Family - Data Sheet 2.0 MB M68HC12B N Y966576647528 Errata 4 /docs/en/errata/68HC912B32MSE4.pdf 2001-10-03 X1002133386147 PSP 35 Mar 15, 2001 Errata This mask set errata provides information pertaining to the byte data link controller (BDLC) applicable to these 68HC912B32 MCU mask set devices: 4J54E, 3J54E, 0J54E, 0J64Y, 9H91F, 3H91F, 1H91F. None /docs/en/errata/68HC912B32MSE4.pdf English documents 16016 None 155452329886410597 2022-12-07 /docs/en/errata/68HC912B32MSE4.pdf 68HC912B32 8-Bit Microcontroller Unit: Mask Set Errata 4 - Errata /docs/en/errata/68HC912B32MSE4.pdf documents 155452329886410597 Errata N en None Y pdf 0 N 68HC912B32 8-Bit Microcontroller Unit: Mask Set Errata 4 - Errata 16.0 KB 68HC912B32MSE4 N X1002133386147 /docs/en/errata/68HC912B32MSE3.pdf 2001-03-05 H983837667989 PSP 36 Mar 1, 2001 Errata This errata provides information applicable to the following MCU mask set devices: 0J64Y. None /docs/en/errata/68HC912B32MSE3.pdf English documents 51949 None 155452329886410597 2022-12-07 /docs/en/errata/68HC912B32MSE3.pdf MC68HC912B32 Microcontroller Unit: Mask Set Errata 3 - Errata /docs/en/errata/68HC912B32MSE3.pdf documents 155452329886410597 Errata N en None Y pdf 2 N MC68HC912B32 Microcontroller Unit: Mask Set Errata 3 - Errata 51.9 KB 68HC912B32MSE3 N H983837667989 /docs/en/errata/68HC912B32MSE1.pdf 2000-08-17 V966576692765 PSP 37 Aug 18, 1999 Errata HC912B32 Device Information Sheet: 09H91F Mask Sets None /docs/en/errata/68HC912B32MSE1.pdf English documents 71041 None 155452329886410597 2022-12-07 /docs/en/errata/68HC912B32MSE1.pdf HC912B32 Device Information Sheet: 09H91F Mask Sets /docs/en/errata/68HC912B32MSE1.pdf documents 155452329886410597 Errata N en None N pdf 1 N HC912B32 Device Information Sheet: 09H91F Mask Sets 71.0 KB 68HC912B32MSE1 N V966576692765 /docs/en/errata/68HC912B32MSE2.pdf 2000-08-17 O966576696164 PSP 38 Aug 18, 1999 Errata HC912B32 Device Information Sheet: 04J54E Mask Sets None /docs/en/errata/68HC912B32MSE2.pdf English documents 34308 None 155452329886410597 2022-12-07 /docs/en/errata/68HC912B32MSE2.pdf HC912B32 Device Information Sheet: 04J54E Mask Sets /docs/en/errata/68HC912B32MSE2.pdf documents 155452329886410597 Errata N en None N pdf 2 N HC912B32 Device Information Sheet: 04J54E Mask Sets 34.3 KB 68HC912B32MSE2 N O966576696164 Product Numbering Scheme 1 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf 2005-11-16 1132164313649710085964 PSP 39 Nov 16, 2005 Product Numbering Scheme MC68HC912B Family Product Numbering Code Key, SG1006 Q3 2006 None /docs/en/product-numbering-scheme/MC68HC912BPN.pdf English documents 43629 None 554336734861737620 2022-12-07 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf MC68HC912B Family Product Numbering Scheme SG1006 Q3 2006 /docs/en/product-numbering-scheme/MC68HC912BPN.pdf documents 554336734861737620 Product Numbering Scheme N en None Y pdf 0 N MC68HC912B Family Product Numbering Scheme SG1006 Q3 2006 43.6 KB MC68HC912BPN N 1132164313649710085964 Reference Manual 2 /secured/assets/documents/en/reference-manual/CPU12RM.pdf 2016-10-31 O966576741768 PSP 2 Mar 30, 2006 Reference Manual This manual describes the features and operation of the core (central processing unit, or CPU, and development support functions) used in all M68HC12 and HCS12 microcontrollers. The CPU12 is a high-speed, 16-bit processing unit that has a programming model identical to that of the industry standard M68HC11 central processor unit (CPU). The CPU12 instruction set is a proper superset of the M68HC11 instruction set. Registration without Disclaimer /secured/assets/documents/en/reference-manual/CPU12RM.pdf English documents 3476085 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=CPU12RM CPU12 - Reference Manual /secured/assets/documents/en/reference-manual/CPU12RM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 4 Y N CPU12 - Reference Manual 3.5 MB CPU12RM N O966576741768 /secured/assets/documents/en/reference-manual/CPU12RG.pdf 2016-10-31 A966576739154 PSP 3 Nov 26, 2001 Reference Manual CPU12 Reference Guide Registration without Disclaimer /secured/assets/documents/en/reference-manual/CPU12RG.pdf English documents 1336997 None 500633505221135046 2023-06-18 Y /webapp/Download?colCode=CPU12RG CPU12 Reference Guide /secured/assets/documents/en/reference-manual/CPU12RG.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 2 Y N CPU12 Reference Guide 1.3 MB CPU12RG N A966576739154 Technical Notes 3 /docs/en/engineering-bulletin/EB396.pdf 2016-10-31 C1024523882098 PSP 32 Jun 19, 2002 Technical Notes Engineering Bulletin None /docs/en/engineering-bulletin/EB396.pdf English documents 239585 None 389245547230346745 2022-12-07 N /docs/en/engineering-bulletin/EB396.pdf Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers /docs/en/engineering-bulletin/EB396.pdf documents 389245547230346745 Technical Notes N en None Y pdf 0 N N Use of OSC2/XTAL as a Clock Output on Freescale Semiconductor Microcontrollers 239.6 KB EB396 N C1024523882098 /docs/en/engineering-bulletin/EB376.pdf 2001-10-31 P1004548463999 PSP 33 Oct 31, 2001 Technical Notes This engineering bulletin compares some HC12 device functionality with the MC9S12DP256. None /docs/en/engineering-bulletin/EB376.pdf English documents 502866 None 389245547230346745 2022-12-07 /docs/en/engineering-bulletin/EB376.pdf A comparison of the MC9S12DP256 (mask set 0K36N) versus the HC12 /docs/en/engineering-bulletin/EB376.pdf documents 389245547230346745 Technical Notes N en None N pdf 2 N A comparison of the MC9S12DP256 (mask set 0K36N) versus the HC12 502.9 KB EB376 N P1004548463999 /docs/en/engineering-bulletin/EB601.pdf 2002-07-29 Y1027964202640 PSP 34 Jul 20, 2000 Technical Notes Describes the basic process for initializing any node which uses an NXP microcontroller (MCU) with a byte data link controller (BDLC) module onto a J1850 network. None /docs/en/engineering-bulletin/EB601.pdf English documents 256038 None 389245547230346745 2022-12-07 /docs/en/engineering-bulletin/EB601.pdf Initializing a BDLC-Based SAE J1850 Node on a GM Class 2 or Chrysler PCI Network /docs/en/engineering-bulletin/EB601.pdf documents 389245547230346745 Technical Notes N en None Y pdf 0 N Initializing a BDLC-Based SAE J1850 Node on a GM Class 2 or Chrysler PCI Network 256.0 KB EB601 N Y1027964202640 true Y Products

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