Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlled by the I²C-bus. The low ON-state resistance of the switch allows connections to be made with minimal propagation delay. Any individual A to B channel or combination of channels can be selected via the I²C-bus, determined by the contents of the programmable Control register. When the I²C-bus bit is HIGH (logic 1), the switch is on and data can flow from Port A to Port B, or vice versa. When the I²C-bus bit is LOW (logic 0), the switch is open, creating a high-impedance state between the two ports, which stops the data flow.
An active LOW reset input (RESET) allows the PCA9549 to recover from a situation where the I²C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I²C-bus state machine and causes all the bits to be open, as does the internal power-on reset function.
Three address pins allow up to eight devices on the same bus.
|
|
|
|
|
|
---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
1-5 of 6 documents
Please wait while your secure files are loading.
Receive the full breakdown. See the product footprint and more in the eCad file.
Receive the full breakdown. See the product footprint and more in the eCad file.