Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
The PCF8582C-2 is a floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 x 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I²C-bus. Up to eight PCF8582C-2 devices may be connected to the I²C-bus. Chip select is accomplished by three address inputs (A0, A1 and A2).
Timing of the E/W cycle is carried out internally, thus no external components are required. Programming Time Control (PTC), Pin 7, must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle.
|
|
|
|
|
|
---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
1-5 of 10 documents
Please wait while your secure files are loading.
Receive the full breakdown. See the product footprint and more in the eCad file.
Receive the full breakdown. See the product footprint and more in the eCad file.