Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
16-bit MCU, S12 core, 128KB Flash, 25MHz, -40/+105degC, Automotive Qualified, QFP 80
Package
HQFP80: plastic, thermal enhanced quad; flat package; 80 terminals; 0.65 mm pitch; 14 mm x 14 mm x 2.3 mm body
Buy Options
S9S12C128F0VFUER
End of Life
12NC: 935321313528
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Security Status | COMPANY PUBLIC |
Description | 16-bit MCU, S12 core, 128KB Flash, 25MHz, -40/+105degC, Automotive Qualified, QFP 80 |
| Parameter | Value |
|---|---|
Number of pins | 80 |
Package Style | HQFP |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | 2nd Level Interconnect | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|---|
S9S12C128F0VFUER(935321313528) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | e3 | REACH SVHC | 935.5 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| Lead Free Soldering | Lead Free Soldering | Lead Free Soldering | |||||
S9S12C128F0VFUER (935321313528) | No | 3 | 260 | 40 | |||
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
S9S12C128F0VFUER (935321313528) | 854231 | EAR99 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
S9S12C128F0VFUER (935321313528) | 2025-04-16 | 2025-05-26 | 202504008I | Freescale Logo to NXP Logo Product Marking Conversion for All Remaining Former Freescale Products |
S9S12C128F0VFUER (935321313528) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about S12C
The S12C is part of Our 48/52/80 pin flash-based MCU family, giving you the power and flexibility of the 16-bit core for a wide range general-purpose industrial and automotive network applications.
An on-chip bandgap-based voltage regulator (Vreg) generates the internal digital supply voltage (VDD) for a 2.97 V to 5.5 V external supply range.
The inclusion of a phase-lock look (PLL) circuit allows power consumption and performance to be adjusted.
A total of 50 I/O port pins and two input pins are available in the 80-pin package version.
Up to 12 I/O port bits are available with wake-up capability from stop or wait mode.