Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Features
80C51 8-Bit Microcontroller Family with Extended Memory; 64 KB/96 KB OTP with 2 KB/3 KB RAM
Buy Options
P87C51MC2BA/02Y
No Longer Manufactured
12NC: 935273219518
Details
Order
Operating Features
| Parameter | Value |
|---|---|
Number of pins | 44 |
Package Style | PLCC |
Product category | 230-OTP/ROM- |
Environmental
| Part/12NC | PbFree | EU RoHS | Halogen Free | RHF Indicator | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
P87C51MC2BA/02Y(935273219518) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 2371.7218024000003 |
Quality
| Part/12NC | Safe Assure Functional Safety | Moisture Sensitivity Level (MSL) | Peak Package Body Temperature (PPT) (C°) | FIT | MTBF | IR | ||
|---|---|---|---|---|---|---|---|---|
| Lead Soldering | Lead Free Soldering | Lead Soldering | Lead Free Soldering | |||||
P87C51MC2BA/02Y (935273219518) | No | 3 | 3 | 240 | 260 | 2.84 | 2.58397932816537E8 | 0.0 |
Shipping
| Part/12NC | Harmonized Tariff (US)Disclaimer | Export Control Classification Number (US) |
|---|---|---|
P87C51MC2BA/02Y (935273219518) | 854231 | EAR99 |
Product Change Notice
| Part/12NC | Issue Date | Effective Date | PCN | Title |
|---|---|---|---|---|
P87C51MC2BA/02Y (935273219518) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
More about P87C51MC2BA
The P87C51Mx2 represents the first microcontroller based on Philips Semiconductors? new 51MX core. The P87C51MC2 features 96 kbytes of OTP program memory and 3 kbytes of data SRAM, while the P87C51MB2 has 64 kbytes of OTP and 2 kbytes of RAM. In addition, both devices are equipped with a Programmable Counter Array (PCA), a watchdog timer that can be configured to different time ranges through SFR bits, as well as two enhanced UARTs and Serial Peripheral Interface (SPI).
Philips Semiconductors? 51MX (Memory eXtension) core is an accelerated 80C51 architecture that executes instructions at twice the rate of standard 80C51 devices. The linear address range of the 51MX has been expanded to support up to 8 Mbytes of program memory and 8 Mbytes of data memory. It retains full program code compatibility to enable design engineers to re-use 80C51 development tools, eliminating the need to move to a new, unfamiliar architecture. The 51MX core also retains 80C51 bus compatibility to allow for the continued use of 80C51-interfaced peripherals and Application Specific Integrated Circuits (ASICs).
The P87C51Mx2 provides greater functionality, increased performance and overall lower system cost. By offering an embedded memory solution combined with the enhancements to manage the memory extension, the P87C51Mx2 eliminates the need for software work-around. The increased program memory enables design engineers to develop more complex programs in a high-level language like C, for example, without struggling to contain the program within the traditional 64 kbytes of program memory. These enhancements also greatly improve C Language efficiency for code size below 64 kbytes.
The 51MX core is described in more detail in the 51MX Architecture Reference.