Understanding the MIPI DSI, CSI-2 and D-PHY Interfaces | NXP Semiconductors

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Understanding the MIPI DSI, CSI-2 and D-PHY Interfaces

Understanding the MIPI DSI, CSI-2 and D-PHY Interfaces

About This Training

Learn about the MIPI D-PHY I/O signaling interface standard. Also learn how the MIPI Display (DSI) and Camera (CSI-2) interface standards work to enable customers to integrate high-bandwidth, low-signal count applications.

Presentation

Understanding the MIPI DSI, CSI-2 and D-PHY Interfaces

What You Will Learn

MIPI Organization Overview
MIPI DSI, CSI-2 and D-PHY Overview
DSI Explained
D-PHY Explained
DSI System Example
CSI-2 Explained
CSI-2 System Example

Presented by

John Phillippe

System Hardware Engineer, NXP Semiconductors

DURATION

31 min

LANGUAGE

English

SKILL LEVEL

Beginner

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Products Featured in This Training

i.MX-RT1170: i.MX RT1170: 1 GHz Crossover MCU with Arm® Cortex® Cores

i.MX-RT1170: i.MX RT1170: 1 GHz Crossover MCU with Arm® Cortex® Cores

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