LPC553X MCU Family Architecture Overview | NXP Semiconductors

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LPC553X MCU Family Architecture Overview

LPC553X MCU Family Architecture Overview

About This Training

This video covers the extensive architecture of the LPC553x family. Here we will cover the peripherals available, the clock source options and clock generation. Also review default configurations and settings as well as an overview of power management.

Presentation

LPC553X MCU Family Architecture Overview

What You Will Learn

Block Diagram and Architecture from LPC553X
Memories and Low Power Cache Control
PowerQuad (PQ) DSP Coprocessor
Input Multiplexer, AND OR INVERTER (AOI)
Timers

Presented by

Mahesh Chandra
System Engineer, NXP Semiconductors

DURATION

1 hr

LANGUAGE

English

SKILL LEVEL

Beginner

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