USBD ROM Stack  2.0
ROM based USB device stack
hw_usbd_ip3511.h
1 /***********************************************************************
2  * $Id:: hw_usbd_ip3511.h 2173 2015-06-23 23:20:40Z usb00423 $
3  *
4  * Project: IP3511 USB device controller definitions
5  *
6  * Description:
7  * This file contains the structure definitions and manifest
8  * constants for the IP3511 component:
9  * Universal Serial Bus Device Controller
10  *
11  ***********************************************************************
12  * Copyright(C) 2011, NXP Semiconductor
13  * All rights reserved.
14  *
15  * Software that is described herein is for illustrative purposes only
16  * which provides customers with programming information regarding the
17  * products. This software is supplied "AS IS" without any warranties.
18  * NXP Semiconductors assumes no responsibility or liability for the
19  * use of the software, conveys no license or title under any patent,
20  * copyright, or mask work right to the product. NXP Semiconductors
21  * reserves the right to make changes in the software without
22  * notification. NXP Semiconductors also make no representation or
23  * warranty that such application will be suitable for the specified
24  * use without further testing or modification.
25  **********************************************************************/
26 
27 #ifndef __HW_USBD_IP3511_H
28 #define __HW_USBD_IP3511_H
29 
30 #include <stdint.h>
31 
32 #ifdef __cplusplus
33 extern "C"
34 {
35 #endif
36 
37 typedef volatile struct _EP_LIST {
38  uint32_t buf_ptr;
39  uint32_t buf_length;
40 } EP_LIST;
41 
42 /* USB Module Register Structure */
43 typedef volatile struct { /* USB Structure */
44  volatile uint32_t DEVCMDSTAT; /* USB Device Command/Status register */
45  volatile uint32_t INFO; /* USB Info register */
46  volatile uint32_t EPLISTSTART; /* USB EP Command/Status List start address */
47  volatile uint32_t DATABUFSTART; /* USB Data buffer start address */
48  volatile uint32_t LPM; /* Link Power Management register */
49  volatile uint32_t EPSKIP; /* USB Endpoint skip */
50  volatile uint32_t EPINUSE; /* USB Endpoint Buffer in use */
51  volatile uint32_t EPBUFCFG; /* USB Endpoint Buffer Configuration register */
52  volatile uint32_t INTSTAT; /* USB interrupt status register */
53  volatile uint32_t INTEN; /* USB interrupt enable register */
54  volatile uint32_t INTSETSTAT; /* USB set interrupt status register */
55  volatile uint32_t INTROUTING; /* USB interrupt routing register */
56  volatile uint32_t RESERVED0[1]; /* HW Module Configuration information */
57  volatile uint32_t EPTOGGLE; /* USB Endpoint toggle register */
58 } USB_REGS_T;
59 
60 #define EP_CMD_INFO_SIZE 8 /* For each physical EP 2 4byte wors are assigned in command/status list */
61 #define EP_ZERO_BUF_MAX_BYTES (64 * 2) /* EP 0 needs 2 buffers aligned at 64 byte boundary */
62  /* IN and OUT share single buffer */
63 
64 #define BUF_ACTIVE (0x1U << 31)
65 #define EP_DISABLED (0x1 << 30)
66 #define EP_STALL (0x1 << 29)
67 #define EP_RESET (0x1 << 28)
68 #define EP_RF_TV (0x1 << 27)
69 #define EP_ISO_TYPE (0x1 << 26)
70 
71 /* Offset is 16 on IP3511, Offset is 11 on IP3511 HS. Need to handle larger EP buffer on high speed. */
72 #define FS_EP_NBYTE_OFFSET 16
73 #define HS_EP_NBYTE_OFFSET 11
74 
75 /* USB Device Command Status */
76 #define USB_EN (0x1 << 7) /* Device Enable */
77 #define USB_SETUP_RCVD (0x1 << 8) /* SETUP token received */
78 #define USB_PLL_ON (0x1 << 9) /* PLL is always ON */
79 #define USB_FORCE_VBUS (0x1 << 10) /* Force VBUS */
80 #define USB_LPM (0x1 << 11) /* LPM is supported */
81 #define USB_IntOnNAK_AO (0x1 << 12) /* Device Interrupt on NAK BULK OUT */
82 #define USB_IntOnNAK_AI (0x1 << 13) /* Device Interrupt on NAK BULK IN */
83 #define USB_IntOnNAK_CO (0x1 << 14) /* Device Interrupt on NAK CTRL OUT */
84 #define USB_IntOnNAK_CI (0x1 << 15) /* Device Interrupt on NAK CTRL IN */
85 #define USB_DCON (0x1 << 16) /* Device connect */
86 #define USB_DSUS (0x1 << 17) /* Device Suspend */
87 #define USB_LPM_SUS (0x1 << 19) /* LPM suspend */
88 #define USB_REMOTE_WAKE (0x1 << 20) /* LPM Remote Wakeup */
89 #define USB_CMD_STAT_SPEED_FULL (0x1 << 22) /* Full speed */
90 #define USB_CMD_STAT_SPEED_HIGH (0x2 << 22) /* high speed */
91 #define USB_DCON_C (0x1 << 24) /* Device connection change */
92 #define USB_DSUS_C (0x1 << 25) /* Device SUSPEND change */
93 #define USB_DRESET_C (0x1 << 26) /* Device RESET */
94 #define USB_OTG_C (0x1 << 27) /* Device OTG status change */
95 #define USB_VBUS_DBOUNCE (0x1 << 28) /* Device VBUS detect */
96 
97 #define USB_TEST_MODE_DIS (0x0 << 29) /* PHY Test Mode */
98 #define USB_TEST_MODE_J (0x1 << 29) /* PHY Test Mode */
99 #define USB_TEST_MODE_K (0x2 << 29) /* PHY Test Mode */
100 #define USB_TEST_MODE_SE0_NAK (0x3 << 29) /* PHY Test Mode */
101 #define USB_TEST_MODE_PACKET (0x4 << 29) /* PHY Test Mode */
102 #define USB_TEST_MODE_FORCE_ENA (0x5 << 29) /* PHY Test Mode */
103 
104 /* Device Interrupt Bit Definitions. Excluding control EP 0 IN and OUT, on Aruba IP3511 (USB0 FS),
105  there are 8 physical EPs, on IP3511 HS (USB1 FS), there are 10 physical EPs. */
106 /* Per review comments from Durgesh, EPs are enabled/disabled via EP List buffer, all the
107  interrupts will be enabled, but will never be fired if EP buffer is not enabled. */
108 #define MAX_PHY_EP_INTS (0xFFFF)
109 
110 #define NZ_EP_OUT_MASK (0x555555554)
111 #define NZ_EP_IN_MASK (0xAAAAAAAA8)
112 #define FRAME_INT (0x1 << 30)
113 #define DEV_STAT_INT (0x80000000)
114 
115 /* Rx & Tx Packet Length Definitions */
116 /* IP3511 length mask is 10 bits, IP3511 HS length mask is 15 bits. */
117 #define FS_PKT_LNGTH_MASK 0x000003FF
118 #define HS_PKT_LNGTH_MASK 0x00007FFF
119 
120 /* IP3511 offset mask is 16 bits, IP3511 HS offset mask is 11 bits. */
121 #define FS_ADDR_OFFSET_MASK 0x0000FFFF
122 #define HS_ADDR_OFFSET_MASK 0x000007FF
123 
124 /* Error Status Register Definitions */
125 #define ERR_NOERROR 0x00
126 #define ERR_PID_ENCODE 0x01
127 #define ERR_UNKNOWN_PID 0x02
128 #define ERR_UNEXPECT_PKT 0x03
129 #define ERR_TCRC 0x04
130 #define ERR_DCRC 0x05
131 #define ERR_TIMEOUT 0x06
132 #define ERR_BABBIE 0x07
133 #define ERR_EOF_PKT 0x08
134 #define ERR_TX_RX_NAK 0x09
135 #define ERR_SENT_STALL 0x0A
136 #define ERR_BUF_OVERRUN 0x0B
137 #define ERR_SENT_EPT_PKT 0x0C
138 #define ERR_BIT_STUFF 0x0D
139 #define ERR_SYNC 0x0E
140 #define ERR_TOGGLE_BIT 0x0F
141 
142 #ifdef __cplusplus
143 }
144 #endif
145 
146 #endif /* __HW_USBD_IP3511_H */
Definition: hw_usbd_ip3511.h:43
Definition: hw_usbd_ip3511.h:37