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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
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This example shows use of the Serial Peripheral Interface (SPI) module in FIFO and interrupt master mode. The CPHA (Clock Phase) bit is asserted so SS needs not be driven by the SPI Master side. If the SPI slave side also uses FIFO mode then communication looks like a 32-bit transfer.
IAR EWARM 7.40.7 | KEIL uVision 5.15 | CrossWorks 3.6 | ATOLLIC TrueStudio 5.3.0 | Kinetis Design Studio 3.0.0 |
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