This section describes default configuration structures for RCM module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).
#define RCM_MODULE_FILT_DI_IN_ALL_MODES_CONFIG |
Value:(tRCM){ \
CLR(RCM_RPFC_RSTFLTSS_MASK)|
SET(RCM_RPFC_RSTFLTSRW(0)), \
SET(RCM_RPFW_RSTFLTSEL(0)) \
}
Configuration structure disables reset pin filter in Run, Wait, Stop, VLPS and VLLSx modes (default).
#define RCM_MODULE_FILT_EN_IN_STOP_MODES_CONFIG |
Value:(tRCM){ \
SET(RCM_RPFC_RSTFLTSS_MASK)|
SET(RCM_RPFC_RSTFLTSRW(0x0)), \
SET(RCM_RPFW_RSTFLTSEL(0x0)) \
}
Configuration structure enables reset pin filter in Stop modes In Run/Wait modes All filtering is disabled
- Warning
- LPO filter has a fixed filter value of 3. Due to a synchronizer on the input data, there is also some associated latency (2 cycles) As a result, 5 cycles are required to complete a transition from low to high or high to low.
#define RCM_MODULE_FILT_CLOCKED_BY_BUS_EN_IN_RUNWAIT_MODES_CONFIG |
( |
|
count | ) |
|
Value:(tRCM){ \
CLR(RCM_RPFC_RSTFLTSS_MASK)|
SET(RCM_RPFC_RSTFLTSRW(0x1)), \
SET(RCM_RPFW_RSTFLTSEL(count)) \
}
Configuration structure enables reset pin filter in Run/Wait modes In Stop modes All filtering is disabled
- Parameters
-
count | - 1 - 32 bus clock filter counts. |
#define RCM_MODULE_FILT_CLOCKED_BY_LPO_EN_IN_RUNWAIT_MODES_CONFIG |
Value:(tRCM){ \
CLR(RCM_RPFC_RSTFLTSS_MASK)|
SET(RCM_RPFC_RSTFLTSRW(0x2)), \
SET(RCM_RPFW_RSTFLTSEL(0x0)) \
}
Configuration structure enables reset pin filter in Run/Wait modes In Stop modes All filtering is disabled
- Warning
- LPO filter has a fixed filter value of 3. Due to a synchronizer on the input data, there is also some associated latency (2 cycles) As a result, 5 cycles are required to complete a transition from low to high or high to low.
#define RCM_MODULE_FILT_CLOCKED_BY_LPO_EN_IN_ALL_MODES_CONFIG |
Value:(tRCM){ \
SET(RCM_RPFC_RSTFLTSS_MASK)|
SET(RCM_RPFC_RSTFLTSRW(2)), \
SET(RCM_RPFW_RSTFLTSEL(0)) \
}
Configuration structure enables reset pin filter in Run, Wait, Stop, VLPS and VLLSx modes (except VLLS0). Filter is clocked by LPO.
- Warning
- LPO filter has a fixed filter value of 3. Due to a synchronizer on the input data, there is also some associated latency (2 cycles). As a result, 5 cycles are required to complete a transition from low to high or high to low.