MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
LPTMR Configuration Structures

Overview

This section describes default configuration structures for LPTRM module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).

Macros

#define LPTMR_MODULE_TMR_CNT_RST_ONTCF_MODE_CONFIG(presc, clksrc)
 Timer mode selected and Timer operation is disabled after LPTMR_Init() function call. Timer counts until TCF flag is set then counter is reset and counting starts again. More...
 
#define LPTMR_MODULE_TMR_FREERUN_MODE_CONFIG(presc, clksrc)
 Timer mode selected and Timer operation is disabled after LPTMR_Init() function call. Timer counts in free running mode. More...
 

Macro Definition Documentation

#define LPTMR_MODULE_TMR_CNT_RST_ONTCF_MODE_CONFIG (   presc,
  clksrc 
)
Value:
(tLPTMR){ \
/* CSR */ SET(LPTMR_CSR_TIE_MASK)|SET(LPTMR_CSR_TPS(0))| \
/* ... */ CLR(LPTMR_CSR_TPP_MASK)|CLR(LPTMR_CSR_TFC_MASK)| \
/* ... */ CLR(LPTMR_CSR_TMS_MASK)|CLR(LPTMR_CSR_TEN_MASK), \
/* PSR */ SET(LPTMR_PSR_PCS(clksrc))|SET(LPTMR_PSR_PRESCALE(presc))| \
/* ... */ CLR(LPTMR_PSR_PBYP_MASK) \
}

Timer mode selected and Timer operation is disabled after LPTMR_Init() function call. Timer counts until TCF flag is set then counter is reset and counting starts again.

Parameters
prescInput clock divider value in range from 0 up 15. It divides Timer clock by factor \(2^{(presc+1)}\).
clksrcSelect one of the LPTMR Clocks Sources.
#define LPTMR_MODULE_TMR_FREERUN_MODE_CONFIG (   presc,
  clksrc 
)
Value:
(tLPTMR){ \
/* CSR */ SET(LPTMR_CSR_TIE_MASK)|SET(LPTMR_CSR_TPS(0))| \
/* ... */ CLR(LPTMR_CSR_TPP_MASK)|SET(LPTMR_CSR_TFC_MASK)| \
/* ... */ CLR(LPTMR_CSR_TMS_MASK)|CLR(LPTMR_CSR_TEN_MASK), \
/* PSR */ SET(LPTMR_PSR_PCS(clksrc))|SET(LPTMR_PSR_PRESCALE(presc))| \
/* ... */ CLR(LPTMR_PSR_PBYP_MASK) \
}

Timer mode selected and Timer operation is disabled after LPTMR_Init() function call. Timer counts in free running mode.

Parameters
prescInput clock divider value in range from 0 up 15. It divides Timer clock by factor \(2^{(presc+1)}\).
clksrcSelect one of the LPTMR Clocks Sources.