MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
ARM Cortex-M0+ Interrupt Priority Levels

Overview

The ARM Cortex®-M0+ core supports four interrupt priority levels: PRI_LVL0 (highest priority), PRI_LVL1, PRI_LVL2 and PRI_LVL3 (lowest priority).

Macros

#define PRI_LVL0
 Priority level 0 (highest priority)
 
#define PRI_LVL1
 Priority level 1.
 
#define PRI_LVL2
 Priority level 2.
 
#define PRI_LVL3
 Priority level 3 (lowest priority)