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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
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This section describes functions and macros of the driver's API.
Macros | |
#define | PDB_SetLDMode(mode) |
Sets the load mode for internal registers. More... | |
#define | PDB_ErrIsrEnable() |
Enables the sequence error interrupt generation. More... | |
#define | PDB_ErrIsrDisable() |
Enables sequence error interrupt generation. More... | |
#define | PDB_SWTrg() |
Generates SW trigger if SW trigger is selected and PDB is enabled. More... | |
#define | PDB_DmaEnable() |
Enables DMA request generation. More... | |
#define | PDB_DmaDisable() |
Disables DMA request generation. More... | |
#define | PDB_Enable() |
Enables the PDB module. More... | |
#define | PDB_Disable() |
Disables the PDB module. More... | |
#define | PDB_IsrEnable() |
Enables interrupt generation. More... | |
#define | PDB_IsrDisable() |
Disables interrupt generation. More... | |
#define | PDB_OneshotModeEnable() |
Enables one shot mode of PDB. More... | |
#define | PDB_ContModeEnable() |
Enables continuous mode of PDB. More... | |
#define | PDB_SetLDOK() |
Enables the loading buffered register by theirs buffered value according to LDMOD selection. More... | |
#define | PDB_SetModulo(modulo) |
Sets the modulo register. More... | |
#define | PDB_SetIdelay(val) |
Sets the delay register. More... | |
#define | PDB_PoutEnable() |
Enables the pulse output. More... | |
#define | PDB_PoutDisable() |
Disables specified the pulse output. More... | |
#define | PDB_PtrgB2BModeEnable(trg) |
Enables back-to-back mode for specified PDB channel pre-trigger. More... | |
#define | PDB_PtrgB2BModeDisable(trg) |
Disables back-to-back mode for specified PDB channel pre-trigger. More... | |
#define | PDB_PtrgBypassModeEnable(trg) |
Enables bypass mode for specified PDB channel pre-trigger. More... | |
#define | PDB_PtrgBypassModeDisable(trg) |
Disables bypass mode for specified PDB channel pre-trigger. More... | |
#define | PDB_PtrgEnable(trg) |
Enables specified channel pre-trigger. More... | |
#define | PDB_PtrgDisable(trg) |
Disables specified channel pre-trigger. More... | |
#define | PDB_PtrgSetDelay(trg, val) |
Sets trigger delay value. More... | |
#define | PDB_PoutSetDelay(dly, val) |
Sets specified pulseout delay value. More... | |
#define | PDB_PtrgInit(trg, cfg, val) |
PDB pre-trigger initialization. More... | |
#define | PDB_PoutInit(cfg, val1, val2) |
PDB pulse out module initialization. More... | |
#define | PDB_Init(pdb, ip, callback) |
PDB module initialization. More... | |
#define PDB_SetLDMode | ( | mode | ) |
This macro sets the load mode for internal registers after PDB_SetLDOK macro is called.
mode | Select one of the PDB Load Modes. |
#define PDB_ErrIsrEnable | ( | ) |
This macro enables the sequence error interrupt. The sequence error occurs when a new pre-trigger asserts when there is a active lock in the PDB channel.
#define PDB_ErrIsrDisable | ( | ) |
This macro disables the sequence error interrupt. The sequence error occurs when a new pre-trigger asserts when there is a active lock in the PDB channel.
#define PDB_SWTrg | ( | ) |
This macro generates software trigger if the PDBTRG_SW is selected as the PDB trigger source.
#define PDB_DmaEnable | ( | ) |
This macro enables the DMA request generation when the PDB counter reaches the value set by PDB_SetIdelay.
#define PDB_DmaDisable | ( | ) |
This macro disables the DMA request generation when the PDB counter reaches the value set by PDB_SetIdelay.
#define PDB_Enable | ( | ) |
#define PDB_Disable | ( | ) |
This macro disables the PDB module. When the PDB is disabled the counter is off.
#define PDB_IsrEnable | ( | ) |
This macro enables an interrupt generation when the PDB counter reaches the value set by PDB_SetIdelay.
#define PDB_IsrDisable | ( | ) |
This macro disables an interrupt generation when the PDB counter reaches the value set by PDB_SetIdelay.
#define PDB_OneshotModeEnable | ( | ) |
This macro enables the one shot mode of the PDB. When the PDB counter reaches value set by PDB_SetModulo the Modulo register is cleared to zero and is waiting to a new trigger.
#define PDB_ContModeEnable | ( | ) |
This macro enables the continuous mode of the PDB. When the PDB counter reaches value set by PDB_SetModulo the counter begins a new counting.
#define PDB_SetLDOK | ( | ) |
This macro updates internal registers of MOD, IDLY, CHnDLYm, POyDLY with the values written to their buffers.
#define PDB_SetModulo | ( | modulo | ) |
This macro specifies the period of the counter.
modulo | 16-bit modulo value. |
#define PDB_SetIdelay | ( | val | ) |
This macro specifies the delay value to schedule the PDB interrupt or the DMA request.
val | 16-bit delay trigger value. |
#define PDB_PoutEnable | ( | ) |
This macro enables the pulse output.
#define PDB_PoutDisable | ( | ) |
This macro disables the pulse output.
#define PDB_PtrgB2BModeEnable | ( | trg | ) |
This macro enables the back-to-back mode for specified PDB channel pre-trigger. If this mode is enabled the ADC conversion complete or XBAR_OUT35 (for pre-trigger 0), XBAR_OUT36 (for pre-trigger 1), XBAR_OUT37 (for pre-trigger 2), XBAR_OUT38 (for pre-trigger 3) is used as an acknowledgement for the next trigger. Which source is used can be selected with the SIM_SelAdcTrg function.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgB2BModeDisable | ( | trg | ) |
This macro disables the back-to-back mode for specified PDB channel pre-trigger.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgBypassModeEnable | ( | trg | ) |
This macro enables the bypass mode for a specified PDB channel pre-trigger. When the bypass mode is selected the pre-trigger asserts one peripheral clock cycle after a rising edge is detected on the selected trigger input source or software trigger is selected and PDB_SWTrg is called.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgBypassModeDisable | ( | trg | ) |
This macro disables the bypass mode for a specified PDB channel pre-trigger. When the bypass mode is disabled the pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on the selected trigger input source or software trigger is selected and PDB_SWTrg is called.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgEnable | ( | trg | ) |
This macro enables specified pre-trigger.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgDisable | ( | trg | ) |
This macro disables specified pre-trigger.
trg | TRG0,TRG1,TRG2,TRG3. |
#define PDB_PtrgSetDelay | ( | trg, | |
val | |||
) |
This macro sets trigger delay value. The pre-trigger asserts when the counter is equal to this value.
trg | TRG0,TRG1,TRG2,TRG3. |
val | 16-bit delay value. |
#define PDB_PoutSetDelay | ( | dly, | |
val | |||
) |
This macro sets specified pulseout delay value. Pulse-out goes high when the PDB counter is equal to the DLY1 value and goes low when is equal to the DLY2 value.
dly | DLY1,DLY2. |
val | 16-bit delay value. |
#define PDB_PtrgInit | ( | trg, | |
cfg, | |||
val | |||
) |
This macro initializes specified pre-trigger. It also initializes pre-trigger delay value.
trg | TRG0,TRG1,TRG2,TRG3. |
cfg | Select one of the PDB Channel and Pretrigger Configuration Structures. |
val | 16-bit delay value. |
#define PDB_PoutInit | ( | cfg, | |
val1, | |||
val2 | |||
) |
This macro initializes pulse output. It also initializes value1 (pulse out goes high) and value2(pulse out goes low).
cfg | Select one of the PDB Pulse Output Configuration Structures. |
val1 | 16-bit delay value (pulse out goes high). |
val2 | 16-bit delay value (pulse out goes low again). |
#define PDB_Init | ( | pdb, | |
ip, | |||
callback | |||
) |
This macro initializes PDB module. It also installs callback function for interrupt vector associated with PDB module: vector 21(PDB0).
pdb | Select one of the PDB Module Configuration Structures. |
ip | Select one of the ARM Cortex-M0+ Interrupt Priority Levels. |
callback | Pointer to the PDB Callback Function. |