MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
AFE Low Power Operation

This example shows typical use of the Analogue Front End (AFE) peripheral operating in low power mode with PGA disabled. The device runs in BLPI mode with 1.0 MHz system, bus, flash and AFE clocks derived from the 4.0 MHz Internal Clock (IRC). The FreeMASTER communicates via UART2 of the MKM34Z256VLx7 device which is configured for 19200/8-N-1 and serviced by application software in a polling mode. Connect USB port of your PC to the on-board OpenSDA's USB to serial bridge (J27) when running example on TWR-KM34Z75M board.

Source code:
/******************************************************************************
* (c) Copyright 2010-2015, Freescale Semiconductor Inc.
* ALL RIGHTS RESERVED.
******************************************************************************
* afelp_test.c
******************************************************************************/
#include "drivers.h"
/* static data definitions */
volatile int32 result[2];
#if defined(__ICCARM__)
#pragma required=result
#endif
void main (void)
{
/* initialize SIM module */
SIM_Init (SIM_MODULE_LP_CONFIG);
/* clock mode 1:1:1, 1.0 MHz */
PMC_SetBGEN (); /* enable VREF in VLPR mode */
/* switch to VLPR mode */
SMC_SetMode(VLPR);
/* VREF module must be initialized after SIM module */
VREFL_Trim( 3); /* VREFL trimmed to 0.400 V */
/* AFE_CH0 & AFE_CH2 init */
/* initialize UART and FreeMASTER */
UART_Init (UART2, UART_MODULE_POLLMODE_CONFIG(19200,1.0e6));
FMSTR_Init();
/* trigger AFE conversions */
/* main loop */
while (1)
{
{
AFE_Read (CH0, &result[0]);
AFE_Read (CH2, &result[1]);
FMSTR_Recorder ();
}
FMSTR_Poll ();
}
}
Freemaster_cfg.h:
/***************************************************************************/
#ifndef __FREEMASTER_CFG_H
#define __FREEMASTER_CFG_H
/******************************************************************************
* Select interrupt or poll-driven serial communication
*******************************************************************************/
#define FMSTR_LONG_INTR 0 /* complete msg processing in interrupt */
#define FMSTR_SHORT_INTR 0 /* SCI FIFO-queuing done in interrupt */
#define FMSTR_POLL_DRIVEN 1 /* no interrupt needed, polling only */
/******************************************************************************
* Select SCI communication interface
*******************************************************************************/
#define FMSTR_USE_SCI 1 /* To select SCI communication interface */
#define FMSTR_USE_PDBDM 0 /* To select Packet Driven BDM interface */
//#define FMSTR_SCI_BASE 0x4006A000 /* UART0 base on MKM34Z7 */
//#define FMSTR_SCI_BASE 0x4006B000 /* UART1 base on MKM34Z7 */
#define FMSTR_SCI_BASE 0x4006C000 /* UART2 base on MKM34Z7 */
//#define FMSTR_SCI_BASE 0x4006D000 /* UART3 base on MKM34Z7 */
/******************************************************************************
* Input/output communication buffer size
*******************************************************************************/
#define FMSTR_COMM_BUFFER_SIZE 200 /* set to 0 for "automatic" */
/******************************************************************************
* Receive FIFO queue size (use with FMSTR_SHORT_INTR only)
*******************************************************************************/
#define FMSTR_COMM_RQUEUE_SIZE 32 /* set to 0 for "default" */
/******************************************************************************
* Support for Application Commands
*******************************************************************************/
#define FMSTR_USE_APPCMD 0 /* enable/disable App.Commands support */
#define FMSTR_APPCMD_BUFF_SIZE 32 /* App.Command data buffer size */
#define FMSTR_MAX_APPCMD_CALLS 4 /* num. of app.cmd callbacks? (0=disable) */
/******************************************************************************
* Oscilloscope support
*******************************************************************************/
#define FMSTR_USE_SCOPE 1 /* enable/disable scope support */
#define FMSTR_MAX_SCOPE_VARS 8 /* max. number of scope variables (2..8) */
/******************************************************************************
* Recorder support
*******************************************************************************/
#define FMSTR_USE_RECORDER 1 /* enable/disable recorder support */
#define FMSTR_MAX_REC_VARS 8 /* max. num. of recorder variables (2..8) */
/* built-in recorder buffer (use when FMSTR_REC_OWNBUFF is 0) */
#define FMSTR_REC_BUFF_SIZE 4096 /* built-in buffer size */
/* recorder time base, specifies how often the recorder is called */
#define FMSTR_REC_TIMEBASE FMSTR_REC_BASE_MILLISEC(0) /* 0 = "unknown" */
#define FMSTR_REC_FLOAT_TRIG 0 /* enable/disable floating point trigger */
/******************************************************************************
* Target-side address translation (TSA)
*******************************************************************************/
#define FMSTR_USE_TSA 0 /* enable TSA functionality */
#define FMSTR_USE_TSA_SAFETY 0 /* enable access to TSA variables only */
#define FMSTR_USE_TSA_INROM 0 /* TSA tables as const (put to ROM) */
/******************************************************************************
* Enable the byte access to communication buffer. All Cortex M0-based devices
* require this option to be set in order to avoid misaligned access to integer
* parameters which is unsupported on this platform.
*******************************************************************************/
#define FMSTR_BYTE_BUFFER_ACCESS 1
#endif /* __FREEMASTER_CFG_H */
Toolchain support:
IAR EWARM 7.40.7KEIL uVision 5.15CrossWorks 3.6ATOLLIC TrueStudio 5.3.0Kinetis Design Studio 3.0.0