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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
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This section describes functions and macros of the driver's API.
Macros | |
#define | SIM_EnableModule(mask) |
Enables clock to selected on-chip module. More... | |
#define | SIM_DisableModule(mask) |
Disables clock to selected on-chip peripheral. More... | |
#define | SIM_SelOsc32kClk(src) |
Selects the 32 KHz clock source for LPTMR, CLKOUT, LCD, EWM and WDOG. More... | |
#define | SIM_TmrFreezeAndResume() |
Resets quad timer counters, output flags and resumes normal operation. More... | |
#define | SIM_SelLpuartClk(src) |
Selects LPUART clock source. More... | |
#define | SIM_SelAfeOutclk(x) |
Selects AFE output clock is either divided by AFE clock prescaler or not divided. More... | |
#define | SIM_SelXbarClkout(src) |
Selects clock source for XBAR_IN[5]. More... | |
#define | SIM_SelClkout(src) |
Selects clock source for CLKOUT port pins. More... | |
#define | SIM_InvSpiOutput(mask) |
Inverts the SPI signal output(s). More... | |
#define | SIM_SelAdcTrgClk(src) |
Selects clock source used to generate the SAR ADC triggers. More... | |
#define | SIM_CtrlPLLVLP(x) |
Enable/disable PLL operation in VLPR/PSTOP1 mode. More... | |
#define | SIM_DisableNMI() |
Disables Non-Maskable Interrupt (NMI) temporarily. More... | |
#define | SIM_EnableNMI() |
Enables Non-Maskable Interrupt (NMI) temporarily. More... | |
#define | SIM_SetClkDiv(div) |
Sets system clock divider mode. More... | |
#define | SIM_SetClkMode(mode) |
Sets system clock mode. More... | |
#define | SIM_EnableFlashDoze() |
Enables Flash Doze in Wait mode. More... | |
#define | SIM_DisableFlashDoze() |
Disable Flash Doze in Wait mode. More... | |
#define | SIM_EnableFlash() |
Enables flash accesses. More... | |
#define | SIM_DisableFlash() |
Disables flash accesses and places flash memory in low power state. More... | |
#define | SIM_SelRtcClk(src) |
Selects between 32KIRC and OSC32K clock sources for RTC operation. More... | |
#define | SIM_SelTmrPcs(ch, src) |
Selects quad timer channel primary count source. More... | |
#define | SIM_SelTmrScs(ch, src) |
Selects quad timer channel secondary count source. More... | |
#define | SIM_SelTmrCh0Clk(src) |
Selects Timer CH0 clock source. More... | |
#define | SIM_SelUartIR(ch, src) |
Selects uart source for driving IR communication. More... | |
#define | SIM_SelModTypeIR(x) |
Selects modulation type for IR communication. More... | |
#define | SIM_SelAfeClkPadDir(dir) |
Selects AFE_CLK pin direction. More... | |
#define | SIM_SelAfePllClk(src) |
Selects between PLL, FLL and OSC clocks as the source for the PLL clock branch for AFE Clock. More... | |
#define | SIM_SelDmaDoneFlag(ch) |
Selects "done" flag of the respective DMA channel to drive XBAR_IN[32]. More... | |
#define | SIM_SelAdcTrg(src) |
Selects ADC trigger source. More... | |
#define | SIM_IsOSC32KEnabled() |
Returns true if 32KHz RTC oscillator is enabled. More... | |
#define | SIM_SelEwmInput(src) |
Selects external watchdog monitor input source. More... | |
#define | SIM_Init(cfg) |
SIM initialization. More... | |
#define SIM_EnableModule | ( | mask | ) |
This macro enables clock to selected on-chip module.
mask | Select peripheral: SPI0,SPI1,CMP,VREF,UART3,UART2,UART1,UART0, I2C1,I2C0,EWM,TMR3,TMR2,TMR1,TMR0,XBAR,RTCREG,RTC,PORTI,PORTH,PORTG, PORTF,PORTE,PORTD,PORTC,PORTB,PORTA,SLCD,LPTMR,PORTM,PORTL,PORTK, PORTJ,PDB,CRC,AFE,PIT1,PIT0,ADC,LPUART,RNGA,DMAMUX,FTFA,CAU,DMA,MPU. |
#define SIM_DisableModule | ( | mask | ) |
This macro disables clock to selected on-chip peripheral.
mask | Select peripheral: SPI0,SPI1,CMP,VREF,UART3,UART2,UART1,UART0, I2C1,I2C0,EWM,TMR3,TMR2,TMR1,TMR0,XBAR,RTCREG,RTC,PORTI,PORTH,PORTG, PORTF,PORTE,PORTD,PORTC,PORTB,PORTA,SLCD,LPTMR,PORTM,PORTL,PORTK, PORTJ,PDB,CRC,AFE,PIT1,PIT0,ADC,LPUART,RNGA,DMAMUX,FTFA,CAU,DMA,MPU. |
#define SIM_SelOsc32kClk | ( | src | ) |
This macro selects the 32 KHz clock source for LPTMR, CLKOUT, LCD, EWM and WDOG.
src | Select one of the SIM OSC32K Clock Sources. |
#define SIM_TmrFreezeAndResume | ( | ) |
This macro resets quad timer counters, output flags and resumes normal operation.
#define SIM_SelLpuartClk | ( | src | ) |
This macro selects LPUART clock source. It sets both the SIM_CTRL_REG[LPUARTSRC] and SIM_CTRL_REG[PLLFLLSEL] muxes.
src | Select one of the SIM LPUART Clock Sources. |
#define SIM_SelAfeOutclk | ( | x | ) |
This macro selects AFE output clock is either divided by AFE clock prescaler or not divided.
x | TRUE Not divided by AFE clock prescaler FALSE Divided by AFE clock prescaler (default). |
#define SIM_SelXbarClkout | ( | src | ) |
This macro selects clock source for XBAR_IN[5].
src | Select one of the SIM CLKOUT Clock Sources |
#define SIM_SelClkout | ( | src | ) |
This macro selects clock source for CLKOUT port pins.
src | Select one of the SIM CLKOUT Clock Sources. |
#define SIM_InvSpiOutput | ( | mask | ) |
This macro inverts the SPI signal output(s) selected by the signal mask parameter.
mask | Select one or more OR'ed SIM SPI Output Signal Masks. |
#define SIM_SelAdcTrgClk | ( | src | ) |
This macro selects clock source used to generate the triggers for SAR ADC.
src | Select one of the SIM SAR ADC Trigger Clock Sources. |
#define SIM_CtrlPLLVLP | ( | x | ) |
This macro enables/disables PLL operation in VLPR/PSTOP1 mode.
x | TRUE PLL operation is enabled in VLPR/PSTOP1 mode FALSE PLL operation is disabled in VLPR/PSTOP1 mode (default). |
#define SIM_DisableNMI | ( | ) |
This macro disables Non-Maskable Interrupt (NMI) temporarily.
#define SIM_EnableNMI | ( | ) |
This macro enables Non-Maskable Interrupt (NMI) temporarily.
#define SIM_SetClkDiv | ( | div | ) |
This macro sets system clock divider.
div | Select one of the SIM System Clock Dividers. |
#define SIM_SetClkMode | ( | mode | ) |
This macro sets system clock mode ratio: SYSCLK : BUSCLK : FLASHCLK.
mode | Select one of the SIM System Clock Modes. |
#define SIM_EnableFlashDoze | ( | ) |
This macro enables Flash Doze in Wait mode. Flash memory will be disabled for the duration of Wait mode. An attempt by the DMA or other bus master to access the Flash when the Flash is disabled will result in a bus error. The wakeup time from Wait mode is extended when this bit is set.
#define SIM_DisableFlashDoze | ( | ) |
This macro disables Flash Doze in Wait mode.
#define SIM_EnableFlash | ( | ) |
#define SIM_DisableFlash | ( | ) |
This macro disables flash accesses and places flash memory in low power state.
#define SIM_SelRtcClk | ( | src | ) |
This macro selects between 32KIRC and OSC32K clock sources for RTC operation.
src | Select one of the SIM RTC Clock Sources. |
#define SIM_SelTmrPcs | ( | ch, | |
src | |||
) |
This macro selects quad timer channel primary count source.
ch | CH0,CH1,CH2,CH3. |
src | Select one of the SIM TMR Primary Count Sources. |
#define SIM_SelTmrScs | ( | ch, | |
src | |||
) |
This macro selects quad timer channel secondary count source.
ch | CH0,CH1,CH2,CH3. | ||||||||||||||||||||
src | Refer to the following table:
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#define SIM_SelTmrCh0Clk | ( | src | ) |
This macro selects either Bus Clock or PLL AFE clock as the source for Timer CH0. The Timer CH0 output can be used as the AFE clock source.
src | TRUE Selects the PLL_AFE clock as the source for Timer CH0 FALSE Selects Bus Clock as source for the Timer CH0 (default). |
#define SIM_SelUartIR | ( | ch, | |
src | |||
) |
This macro selects uart source for driving IR communication.
ch | UART0,UART1,UART2,UART3. | |||||||||||||||
src | Refer to the following table:
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#define SIM_SelModTypeIR | ( | x | ) |
This macro selects modulation type for IR communication.
x | TRUE TypeB (ANDed) Modulation selected for IRDA FALSE TypeA (ORed) Modulation selected for IRDA (default). |
#define SIM_SelAfeClkPadDir | ( | dir | ) |
This macro selects direction of the AFE_CLK pin.
dir | TRUE AFE CLK PAD is output FALSE AFE CLK PAD is input (default). |
#define SIM_SelAfePllClk | ( | src | ) |
This macro selects between PLL, FLL and OSC clocks as the source for the PLL clock branch for AFE Clock.
src | Select one of the SIM AFE Clock Sources. |
#define SIM_SelDmaDoneFlag | ( | ch | ) |
This macro selects "done" flag of the respective DMA channel to drive XBAR_IN[32].
ch | DMA0,DMA1,DMA2,DMA3. |
#define SIM_SelAdcTrg | ( | src | ) |
This macro selects ADC trigger source.
src | TRUE PDB output to trigger ADC FALSE XBAR to trigger ADC (default). |
#define SIM_IsOSC32KEnabled | ( | ) |
This macro returns true of 32KHz RTC oscillator is enabled.
#define SIM_SelEwmInput | ( | src | ) |
This macro selects external watchdog monitor input source.
src | Select one of the SIM EWM Input Sources. |
#define SIM_Init | ( | cfg | ) |
This macro initializes System Integration Module (SIM).
cfg | Select one of the SIM Configuration Structures. |