This section describes default configuration structures for MPU module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).
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#define | MPU_RGD_DI_CONFIG |
| Configures region descriptor, start and end addresses, process identifier and mask to default (POR) state. Region descriptor is marked as invalid (disabled). More...
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#define | MPU_RGD_EN_GLOBAL_CONFIG |
| Configures global region descriptor with start address=0x00000000, end address=0xffffffff, M0SM and M2SM=0x03 (same as M0UM and M2UM), M0UM and M2UM=0x07 (RWX access enabled) and process identifier and mask disabled. More...
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#define | MPU_RGD_EN_CM0_PID_OFF_DMA_PID_OFF_CONFIG(cm0_spvr, cm0_user, dma_spvr, dma_user, start_addr, end_addr) |
| Basic configuration. Process identifier and mask are not included in the region hit evaluation on any bus master. Region descriptor is marked as valid (enabled). More...
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#define | MPU_RGD_EN_CM0_PID_ON_DMA_PID_OFF_CONFIG(cm0_spvr, cm0_user, dma_spvr, dma_user, pid, pid_mask, start_addr, end_addr) |
| Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "CM0" master. Region descriptor is marked as valid (enabled). More...
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#define | MPU_RGD_EN_CM0_PID_OFF_DMA_PID_ON_CONFIG(cm0_spvr, cm0_user, dma_spvr, dma_user, pid, pid_mask, start_addr, end_addr) |
| Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "DMA" master. Region descriptor is marked as valid (enabled). More...
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#define | MPU_RGD_EN_CM0_PID_ON_DMA_PID_ON_CONFIG(cm0_spvr, cm0_user, dma_spvr, dma_user, pid, pid_mask, start_addr, end_addr) |
| Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "CM0" and "DMA" masters. Region descriptor is marked as valid (enabled). More...
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#define MPU_RGD_DI_CONFIG |
Value:(tMPU_RGD){ \
CLR(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(0x03))| \
SET(MPU_WORD_M2UM(0x00))| \
CLR(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(0x03))| \
SET(MPU_WORD_M0UM(0x00)), \
SET(MPU_WORD_PID(0x00))|
SET(MPU_WORD_PIDMASK(0x00))| \
CLR(MPU_WORD_VLD_MASK), \
}
Configures region descriptor, start and end addresses, process identifier and mask to default (POR) state. Region descriptor is marked as invalid (disabled).
#define MPU_RGD_EN_GLOBAL_CONFIG |
Value:(tMPU_RGD){ \
CLR(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(0x03))| \
SET(MPU_WORD_M2UM(0x07))| \
CLR(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(0x03))| \
SET(MPU_WORD_M0UM(0x07)), \
SET(MPU_WORD_PID(0x00))|
SET(MPU_WORD_PIDMASK(0x00))| \
CLR(MPU_WORD_VLD_MASK), \
}
Configures global region descriptor with start address=0x00000000, end address=0xffffffff, M0SM and M2SM=0x03 (same as M0UM and M2UM), M0UM and M2UM=0x07 (RWX access enabled) and process identifier and mask disabled.
- Note
- Such global descriptor prevents region hit because granting permission is a higher priority than denying access for overlapping regions.
#define MPU_RGD_EN_CM0_PID_OFF_DMA_PID_OFF_CONFIG |
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cm0_spvr, |
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cm0_user, |
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dma_spvr, |
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dma_user, |
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start_addr, |
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end_addr |
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Value:(tMPU_RGD){ \
CLR(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(dma_spvr))| \
SET(MPU_WORD_M2UM(dma_user))| \
CLR(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(cm0_spvr))| \
SET(MPU_WORD_M0UM(cm0_user)), \
SET(MPU_WORD_PID(0x00))|
SET(MPU_WORD_PIDMASK(0x00))| \
SET(MPU_WORD_VLD_MASK), \
}
Basic configuration. Process identifier and mask are not included in the region hit evaluation on any bus master. Region descriptor is marked as valid (enabled).
- Parameters
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#define MPU_RGD_EN_CM0_PID_ON_DMA_PID_OFF_CONFIG |
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cm0_spvr, |
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cm0_user, |
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dma_spvr, |
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dma_user, |
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pid, |
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pid_mask, |
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start_addr, |
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end_addr |
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) |
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Value:(tMPU_RGD){ \
CLR(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(dma_spvr))| \
SET(MPU_WORD_M2UM(dma_user))| \
SET(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(cm0_spvr))| \
SET(MPU_WORD_M0UM(cm0_user)), \
SET(MPU_WORD_PID(pid))|
SET(MPU_WORD_PIDMASK(pid_mask))| \
SET(MPU_WORD_VLD_MASK), \
}
Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "CM0" master. Region descriptor is marked as valid (enabled).
- Parameters
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#define MPU_RGD_EN_CM0_PID_OFF_DMA_PID_ON_CONFIG |
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cm0_spvr, |
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cm0_user, |
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dma_spvr, |
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dma_user, |
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pid, |
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pid_mask, |
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start_addr, |
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end_addr |
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Value:(tMPU_RGD){ \
SET(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(dma_spvr))| \
SET(MPU_WORD_M2UM(dma_user))| \
CLR(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(cm0_spvr))| \
SET(MPU_WORD_M0UM(cm0_user)), \
SET(MPU_WORD_PID(pid))|
SET(MPU_WORD_PIDMASK(pid_mask))| \
SET(MPU_WORD_VLD_MASK), \
}
Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "DMA" master. Region descriptor is marked as valid (enabled).
- Parameters
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#define MPU_RGD_EN_CM0_PID_ON_DMA_PID_ON_CONFIG |
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cm0_spvr, |
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cm0_user, |
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dma_spvr, |
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dma_user, |
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pid, |
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pid_mask, |
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start_addr, |
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end_addr |
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Value:(tMPU_RGD){ \
SET(MPU_WORD_M2PE_MASK)|
SET(MPU_WORD_M2SM(dma_spvr))| \
SET(MPU_WORD_M2UM(dma_user))| \
SET(MPU_WORD_M0PE_MASK)|
SET(MPU_WORD_M0SM(cm0_spvr))| \
SET(MPU_WORD_M0UM(cm0_user)), \
SET(MPU_WORD_PID(pid))|
SET(MPU_WORD_PIDMASK(pid_mask))| \
SET(MPU_WORD_VLD_MASK), \
}
Advanced configuration. Process identifier and mask are included in the region hit evaluation of the "CM0" and "DMA" masters. Region descriptor is marked as valid (enabled).
- Parameters
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