MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
SMC Example

This example shows unique capability of the device to wake up from Very Low Power Stop (VLPS) mode when an active edge on receive pin of the UART is detected. Immediately after POR, the device enters very low power run (VLPR) mode with core clock = 400 kHz. Afterwards FreeMASTER communication is initialized. The FreeMASTER will communicate via UART2 communication port which is set to 4800/8-N-1 and communication will be handled by interrupts. In order to conserve energy, the device enters Very Low Power Stop (VLPS) mode and stay in this mode for most of the time. When user initiates FreeMASTER communication, by releasing "STOP" button of the FreeMASTER GUI, the UART2 generates wakeup event and the device resumes VLPR operation. As long as FreeMASTER communication is active the device receives and sends packets from/to the host PC. When user stops FreeMASTER communication, by pressing "STOP" button of the FreeMASTER GUI, the device enters Very Low Power Stop (VLPS) mode again. When using TWR-KM34Z75M board, connect USB port of your PC to the on-board OpenSDA's USB to serial bridge (J27).

Source code:
/******************************************************************************
* (c) Copyright 2010-2015, Freescale Semiconductor Inc.
* ALL RIGHTS RESERVED.
******************************************************************************
* vlpsuart_test.c
******************************************************************************/
#include "drivers.h"
/* uart callback function prototype */
static void uart_callback (UART_CALLBACK_SRC module, UART_CALLBACK_TYPE type,
int32 status);
/* static data definition */
static int volatile counter = 0;
/* device boot in VLPR mode - see appconfig.h */
void main (void)
{
/* Core:Bus:Flash = 2:1:1; Core clock = 0.4 MHz */
/* enable clock to modules */
/* UART2 init 4800bd */
UART_Init (UART2, UART_MODULE_INTRMODE_CONFIG(4800,0.2e6));
UART_InstallCallback (PRI_LVL1, uart_callback);
FMSTR_Init();
/* initialize LPTMR in freerun mode */
while(1)
{
if (LPTMR_ReadCnt() >= 500) { LPTMR_Disable (); SMC_SetMode (VLPS); }
FMSTR_Recorder ();
counter++;
}
}
/* uart callback function definition */
static void uart_callback (UART_CALLBACK_SRC module, UART_CALLBACK_TYPE type,
int32 status)
{
if (module == UART2_CALLBACK)
{
if (type == UART_EDG_CALLBACK) { LPTMR_Enable(); }
FMSTR_Isr ();
}
}
Appconfig.h:
/******************************************************************************
* (c) Copyright 2010, Freescale Semiconductor Inc.
* ALL RIGHTS RESERVED.
***************************************************************************/
#ifndef __APPCONFIG_H
#define __APPCONFIG_H
/***************************************************************************/
//#define MTB_RAM_RESERVE
/***************************************************************************/
#define BOOT_NMI_DISABLE
#define BOOT_EXT_CLK
#define BOOT_SWVLPR_MODE
/***************************************************************************/
/******************************************************************************/
#endif /* __APPCONFIG_ */
Freemaster_cfg.h:
/***************************************************************************/
#ifndef __FREEMASTER_CFG_H
#define __FREEMASTER_CFG_H
/******************************************************************************
* Select interrupt or poll-driven serial communication
*******************************************************************************/
#define FMSTR_LONG_INTR 1 /* complete msg processing in interrupt */
#define FMSTR_SHORT_INTR 0 /* SCI FIFO-queuing done in interrupt */
#define FMSTR_POLL_DRIVEN 0 /* no interrupt needed, polling only */
/******************************************************************************
* Select SCI communication interface
*******************************************************************************/
#define FMSTR_USE_SCI 1 /* To select SCI communication interface */
#define FMSTR_USE_PDBDM 0 /* To select Packet Driven BDM interface */
//#define FMSTR_SCI_BASE 0x4006A000 /* UART0 base on MKM34Z7 */
//#define FMSTR_SCI_BASE 0x4006B000 /* UART1 base on MKM34Z7 */
#define FMSTR_SCI_BASE 0x4006C000 /* UART2 base on MKM34Z7 */
//#define FMSTR_SCI_BASE 0x4006D000 /* UART3 base on MKM34Z7 */
/******************************************************************************
* Input/output communication buffer size
*******************************************************************************/
#define FMSTR_COMM_BUFFER_SIZE 200 /* set to 0 for "automatic" */
/******************************************************************************
* Receive FIFO queue size (use with FMSTR_SHORT_INTR only)
*******************************************************************************/
#define FMSTR_COMM_RQUEUE_SIZE 32 /* set to 0 for "default" */
/******************************************************************************
* Support for Application Commands
*******************************************************************************/
#define FMSTR_USE_APPCMD 0 /* enable/disable App.Commands support */
#define FMSTR_APPCMD_BUFF_SIZE 32 /* App.Command data buffer size */
#define FMSTR_MAX_APPCMD_CALLS 4 /* num. of app.cmd callbacks? (0=disable) */
/******************************************************************************
* Oscilloscope support
*******************************************************************************/
#define FMSTR_USE_SCOPE 1 /* enable/disable scope support */
#define FMSTR_MAX_SCOPE_VARS 8 /* max. number of scope variables (2..8) */
/******************************************************************************
* Recorder support
*******************************************************************************/
#define FMSTR_USE_RECORDER 1 /* enable/disable recorder support */
#define FMSTR_MAX_REC_VARS 8 /* max. num. of recorder variables (2..8) */
/* built-in recorder buffer (use when FMSTR_REC_OWNBUFF is 0) */
#define FMSTR_REC_BUFF_SIZE 4096 /* built-in buffer size */
/* recorder time base, specifies how often the recorder is called */
#define FMSTR_REC_TIMEBASE FMSTR_REC_BASE_MILLISEC(0) /* 0 = "unknown" */
#define FMSTR_REC_FLOAT_TRIG 0 /* enable/disable floating point trigger */
/******************************************************************************
* Target-side address translation (TSA)
*******************************************************************************/
#define FMSTR_USE_TSA 0 /* enable TSA functionality */
#define FMSTR_USE_TSA_SAFETY 0 /* enable access to TSA variables only */
#define FMSTR_USE_TSA_INROM 0 /* TSA tables as const (put to ROM) */
/******************************************************************************
* Enable the byte access to communication buffer. All Cortex M0-based devices
* require this option to be set in order to avoid misaligned access to integer
* parameters which is unsupported on this platform.
*******************************************************************************/
#define FMSTR_BYTE_BUFFER_ACCESS 1
#endif /* __FREEMASTER_CFG_H */
Toolchain support:
IAR EWARM 7.40.7KEIL uVision 5.15CrossWorks 3.6ATOLLIC TrueStudio 5.3.0Kinetis Design Studio 3.0.0