MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
PDB Example

This example shows typical use of the Programmable Delay Block (PDB) ADC trigger function in software trigger mode. The PDB module is initially clocked with a BUSCLK. The BUSCLK is 1MHz in this case. PDB counter modulo is configured on 60000 count (after about 60ms the counter overflows). Pre-trigger channels are configured in delayed mode. Pre-trigger CH0 triggers ADC's CHA (this channel measures ADC single input 8) after a 5ms delay after the PDB SW counter trigger. After next 10ms the pre-trigger CH1 triggers ADC's CHB (this channel measures ADC single input 15) and after next 10ms the pre-trigger CH2 triggers ADC's CHC (this channel measures ADC single input 14). When the PDB counter reaches 60000 counts the counter overflows and whole process is repeating.

Source code:
/******************************************************************************
* (c) Copyright 2010-2015, Freescale Semiconductor Inc.
* ALL RIGHTS RESERVED.
******************************************************************************
* pdb_test.c
******************************************************************************/
#include "drivers.h"
static uint16 volatile tmp16[3];
void main (void)
{
/* enable clocks to all on chip peripherals */
/* PDB pre-trigger outputs are connected with the ADC's HW trigger inputs */
/* ADC init - HW trigger is selected */
PRI_LVL0, NULL);
/* PDB init - pre trigger channels 0,1,2 are configured */
/* Trigger the PDB counter */
while (1)
{
if (ADC_Ready(CHA))
{
tmp16[0] = ADC_Read(CHA);
}
if (ADC_Ready(CHB))
{
tmp16[1] = ADC_Read(CHB);
}
if (ADC_Ready(CHC))
{
tmp16[2] = ADC_Read(CHC);
}
}
}
Toolchain support:
IAR EWARM 7.40.7KEIL uVision 5.15CrossWorks 3.6ATOLLIC TrueStudio 5.3.0Kinetis Design Studio 3.0.0