MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
PDB AFE Trigger

In this example, the Phase Delay Block (PDB) triggers the AFE. The PDB counter is in one shot mode and is triggered by the CMP2 output (rising edge in compared voltages in this case). After the CMP2 trigger occurs the AFE channels are triggered with different delays.

Source code:
/******************************************************************************
* (c) Copyright 2010-2015, Freescale Semiconductor Inc.
* ALL RIGHTS RESERVED.
******************************************************************************
* pdbafe_test.c
******************************************************************************/
#include "drivers.h"
static int32 volatile tmp32[4];
void main (void)
{
/* enable clocks to all on chip peripherals */
/* VREF module must be initialized after SIM module */
VREFL_Trim( 3); /* VREFL trimmed to 0.400 V */
/* CMP init */
CMP_Init (CMP2,
IN4,
/* AFE init */
/* route the ADC conversion complete signals to the PDB pre-trigger acks */
/* inputs */
0,
NULL);
/* PDB init - pre trigger channels 0,1,2,3 are configured. */
while (1)
{
{
tmp32[0] = AFE_ChRead(CH0);
}
{
tmp32[1] = AFE_ChRead(CH1);
}
{
tmp32[2] = AFE_ChRead(CH2);
}
{
tmp32[3] = AFE_ChRead(CH3);
}
}
}
Toolchain support:
IAR EWARM 7.40.7KEIL uVision 5.15CrossWorks 3.6ATOLLIC TrueStudio 5.3.0Kinetis Design Studio 3.0.0