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MKMxxZxxACxx5 Bare Metal Software Drivers
R4.1.6
Reference Manual
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This section describes defines, macros and inline functions which interface to the MKMxxZxxACxx5 core's platform based on the ARM's Cortex-M0+ core.
Contents | |
SVC Example | |
ARM Cortex-M0+ Interrupt Priority Levels | |
ARM Cortex-M0+ Macros | |
Generic Peripheral Channels | |
SVC Callback Function | |