MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
SYST Configuration Structures

Overview

This section describes default configuration structures for SYST module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).

Macros

#define SYST_MODULE_FREERUN_TMR_DIV1_EN_CONFIG
 Enables System Timer operation. The System Timer operates in a freerun 24-bit Timer mode. Timer is clocked by the system clock. More...
 
#define SYST_MODULE_FREERUN_TMR_DIV16_EN_CONFIG
 Enables System Timer operation. The System Timer operates in a freerun 24-bit Timer mode. Timer is clocked by the system clock divided by 16. More...
 
#define SYST_MODULE_RELOAD_TMR_DIV1_EN_CONFIG(reload)
 Enables System Timer operation. The System Timer operates in a reload mode. Timer is clocked by the system clock. More...
 
#define SYST_MODULE_RELOAD_TMR_DIV16_EN_CONFIG(reload)
 Enables System Timer operation. The System Timer operates in a reload mode. Timer is clocked by the system clock divided by 16. More...
 
#define SYST_MODULE_FREERUN_TMR_DIV1_DI_CONFIG
 Configures System Timer operation. The System Timer is configured in a freerun 24-bit Timer mode. Timer is clocked by the system clock. More...
 
#define SYST_MODULE_FREERUN_TMR_DIV16_DI_CONFIG
 Configures System Timer operation. The System Timer is configured in a freerun 24-bit Timer mode. Timer is clocked by the system clock divided by 16. More...
 
#define SYST_MODULE_RELOAD_TMR_DIV1_DI_CONFIG(reload)
 Configures System Timer operation. The System Timer is configured in a reload mode. Timer is clocked by the system clock. More...
 
#define SYST_MODULE_RELOAD_TMR_DIV16_DI_CONFIG(reload)
 Configures System Timer operation. The System Timer is configured in a reload mode. Timer is clocked by the system clock divided by 16. More...
 

Macro Definition Documentation

#define SYST_MODULE_FREERUN_TMR_DIV1_EN_CONFIG
Value:
(tSYST){ \
/* CSR */ SET(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ SET(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD(0x00FFFFFF)), \
}

Enables System Timer operation. The System Timer operates in a freerun 24-bit Timer mode. Timer is clocked by the system clock.

#define SYST_MODULE_FREERUN_TMR_DIV16_EN_CONFIG
Value:
(tSYST){ \
/* CSR */ SET(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ CLR(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD(0x00FFFFFF)), \
}

Enables System Timer operation. The System Timer operates in a freerun 24-bit Timer mode. Timer is clocked by the system clock divided by 16.

#define SYST_MODULE_RELOAD_TMR_DIV1_EN_CONFIG (   reload)
Value:
(tSYST){ \
/* CSR */ SET(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ SET(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD((reload-1)&0x00FFFFFF)), \
}

Enables System Timer operation. The System Timer operates in a reload mode. Timer is clocked by the system clock.

Parameters
reloadReload value in the range 0x00000001 to 0x00FFFFFF (24-bit).
#define SYST_MODULE_RELOAD_TMR_DIV16_EN_CONFIG (   reload)
Value:
(tSYST){ \
/* CSR */ SET(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ CLR(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD((reload-1)&0x00FFFFFF)), \
}

Enables System Timer operation. The System Timer operates in a reload mode. Timer is clocked by the system clock divided by 16.

Parameters
reloadReload value in the range 0x00000001 to 0x00FFFFFF (24-bit).
#define SYST_MODULE_FREERUN_TMR_DIV1_DI_CONFIG
Value:
(tSYST){ \
/* CSR */ CLR(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ SET(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD(0x00FFFFFF)), \
}

Configures System Timer operation. The System Timer is configured in a freerun 24-bit Timer mode. Timer is clocked by the system clock. Call SYST_Enable macro to enable System Timer operation.

#define SYST_MODULE_FREERUN_TMR_DIV16_DI_CONFIG
Value:
(tSYST){ \
/* CSR */ CLR(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ CLR(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD(0x00FFFFFF)), \
}

Configures System Timer operation. The System Timer is configured in a freerun 24-bit Timer mode. Timer is clocked by the system clock divided by 16. Call SYST_Enable macro to enable System Timer operation.

#define SYST_MODULE_RELOAD_TMR_DIV1_DI_CONFIG (   reload)
Value:
(tSYST){ \
/* CSR */ CLR(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ SET(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD((reload-1)&0x00FFFFFF)), \
}

Configures System Timer operation. The System Timer is configured in a reload mode. Timer is clocked by the system clock. Call SYST_Enable macro to enable System Timer operation.

Parameters
reloadReload value in the range 0x00000001 to 0x00FFFFFF (24-bit).
#define SYST_MODULE_RELOAD_TMR_DIV16_DI_CONFIG (   reload)
Value:
(tSYST){ \
/* CSR */ CLR(SysTick_CSR_ENABLE_MASK)|CLR(SysTick_CSR_TICKINT_MASK)| \
/* ... */ CLR(SysTick_CSR_CLKSOURCE_MASK), \
/* RVR */ SET(SysTick_RVR_RELOAD((reload-1)&0x00FFFFFF)), \
}

Configures System Timer operation. The System Timer is configured in a reload mode. Timer is clocked by the system clock divided by 16. Call SYST_Enable macro to enable System Timer operation.

Parameters
reloadReload value in the range 0x00000001 to 0x00FFFFFF (24-bit).