MKMxxZxxACxx5 Bare Metal Software Drivers  R4.1.6
Reference Manual
SIM API Specification

Overview

This section describes functions and macros of the driver's API.

Macros

#define SIM_EnableModule(mask)
 Enables clock to selected on-chip module. More...
 
#define SIM_DisableModule(mask)
 Disables clock to selected on-chip peripheral. More...
 
#define SIM_SelOsc32kClk(src)
 Selects the 32 KHz clock source for LPTMR, CLKOUT, LCD, EWM and WDOG. More...
 
#define SIM_SelClkout(src)
 Selects clock source for CLKOUT port pins. More...
 
#define SIM_SelAdcTrgClk(src)
 Selects clock source used to generate the SAR ADC triggers. More...
 
#define SIM_CtrlPLLVLP(x)
 Enable/disable PLL operation in VLPR/PSTOP1 mode. More...
 
#define SIM_DisableNMI()
 Disables Non-Maskable Interrupt (NMI) temporarily. More...
 
#define SIM_EnableNMI()
 Enables Non-Maskable Interrupt (NMI) temporarily. More...
 
#define SIM_SetClkDiv(div)
 Sets system clock divider mode. More...
 
#define SIM_SetClkMode(mode)
 Sets system clock mode. More...
 
#define SIM_EnableFlashDoze()
 Enables Flash Doze in Wait mode. More...
 
#define SIM_DisableFlashDoze()
 Disable Flash Doze in Wait mode. More...
 
#define SIM_EnableFlash()
 Enables flash accesses. More...
 
#define SIM_DisableFlash()
 Disables flash accesses and places flash memory in low power state. More...
 
#define SIM_SelRtcClk(src)
 Selects between 32KIRC and OSC32K clock sources for RTC operation. More...
 
#define SIM_SelAfeClkPadDir(dir)
 Selects AFE_CLK pin direction. More...
 
#define SIM_SelAfeClkPadDir(dir)
 Selects AFE_CLK pin direction. More...
 
#define SIM_SelXbarAfeModOut(src)
 Selects AFE Modulator Output to drive XBAR_IN[3]. More...
 
#define SIM_SelXbarPitOut(src)
 Selects PIT Timer and Timer channel to drive XBAR_IN[16]. More...
 
#define SIM_SelTmrPcs(ch, src)
 Selects quad timer channel primary count source. More...
 
#define SIM_SelTmrScs(ch, src)
 Selects quad timer channel secondary count source. More...
 
#define SIM_SelTmrCh0Clk(src)
 Selects Timer CH0 clock source. More...
 
#define SIM_SelUartIR(ch, src)
 Selects uart source for driving IR communication. More...
 
#define SIM_SelModTypeIR(x)
 Selects modulation type for IR communication. More...
 
#define SIM_SelAfePllClk(src)
 Selects between PLL, FLL and OSC clocks as the source for the PLL clock branch for AFE Clock. More...
 
#define SIM_SelEwmInput(src)
 Selects external watchdog monitor input source. More...
 
#define SIM_Init(cfg)
 SIM initialization. More...
 

Macro Definition Documentation

#define SIM_EnableModule (   mask)

This macro enables clock to selected on-chip module.

Parameters
maskSelect peripheral: SPI0,SPI1,CMP1,CMP0,VREF,UART3,UART2,UART1, UART0,I2C1,I2C0,OSC,MCG,EWM,TMR3,TMR2,TMR1,TMR0,XBAR,WDOG, IRTCREGFILE,IRTC,PORTI,PORTH,PORTG,PORTF,PORTE,PORTD,PORTC, PORTB,PORTA,SLCD,SIM_LP,LPTMR,CRC,AFE,PIT1,PIT0,ADC,RNGA, DMAMUX3,DMAMUX2,DMAMUX1,DMAMUX0,FTFA,DMA,MPU.
Note
Implemented as an inline macro.
See also
SIM_DisableModule
#define SIM_DisableModule (   mask)

This macro disables clock to selected on-chip peripheral.

Parameters
maskSelect peripheral: SPI0,SPI1,CMP1,CMP0,VREF,UART3,UART2,UART1, UART0,I2C1,I2C0,OSC,MCG,EWM,TMR3,TMR2,TMR1,TMR0,XBAR,WDOG, IRTCREGFILE,IRTC,PORTI,PORTH,PORTG,PORTF,PORTE,PORTD,PORTC, PORTB,PORTA,SLCD,SIM_LP,LPTMR,CRC,AFE,PIT1,PIT0,ADC,RNGA, DMAMUX3,DMAMUX2,DMAMUX1,DMAMUX0,FTFA,DMA,MPU.
Note
Implemented as an inline macro.
See also
SIM_EnableModule
#define SIM_SelOsc32kClk (   src)

This macro selects the 32 KHz clock source for LPTMR, CLKOUT, LCD, EWM and WDOG.

Parameters
srcSelect one of the SIM OSC32K Clock Sources.
Note
Implemented as an inline macro.
Warning
This bit is reset only on POR/LVD.
#define SIM_SelClkout (   src)

This macro selects clock source for CLKOUT port pins.

Parameters
srcSelect one of the SIM CLKOUT Clock Sources.
Note
Implemented as an inline macro.
See also
IRTC_SelRtcClkout
#define SIM_SelAdcTrgClk (   src)

This macro selects clock source used to generate the triggers for SAR ADC.

Parameters
srcSelect one of the SIM SAR ADC Trigger Clock Sources.
Note
Implemented as an inline macro
Warning
Default option SIM_ADCTRGCLK_SRC1 (Bus clock) is not available for conversion and should not be selected in case a conversion needs to be performed while in STOP or VLPS modes.
#define SIM_CtrlPLLVLP (   x)

This macro enables/disables PLL operation in VLPR/PSTOP1 mode.

Parameters
xTRUE PLL operation is enabled in VLPR/PSTOP1 mode
FALSE PLL operation is disabled in VLPR/PSTOP1 mode (default).
Note
Implemented as an inline macro.
See also
PLL_Enable, PLL_Init, PLL_CtrlPLLSTEN
#define SIM_DisableNMI ( )

This macro disables Non-Maskable Interrupt (NMI) temporarily.

Note
Implemented as an inline macro.
Warning
Disable NMI functionality on the pin whenever it is used as the GPIO or in any alternate assignment.
See also
SIM_EnableNMI
#define SIM_EnableNMI ( )

This macro enables Non-Maskable Interrupt (NMI) temporarily.

Note
Implemented as an inline macro.
Warning
Do Not enable NMI functionality on the pin unless it is assigned to NMI.
See also
SIM_DisableNMI
#define SIM_SetClkDiv (   div)

This macro sets system clock divider.

Parameters
divSelect one of the SIM System Clock Dividers.
Note
Implemented as an inline macro.
See also
SIM_SetClkMode
#define SIM_SetClkMode (   mode)

This macro sets system clock mode ratio: SYSCLK : BUSCLK : FLASHCLK.

Parameters
modeSelect one of the SIM System Clock Modes.
Note
Implemented as an inline macro.
See also
SIM_SetClkDiv
#define SIM_EnableFlashDoze ( )

This macro enables Flash Doze in Wait mode. Flash memory will be disabled for the duration of Wait mode. An attempt by the DMA or other bus master to access the Flash when the Flash is disabled will result in a bus error. The wakeup time from Wait mode is extended when this bit is set.

Note
Implemented as an inline macro.
Warning
This bit should be clear during VLP modes.
The Flash will be automatically enabled again at the end of Wait mode so interrupt vectors do not need to be relocated out of Flash memory.
See also
SIM_DisableFlashDoze
#define SIM_DisableFlashDoze ( )

This macro disables Flash Doze in Wait mode.

Note
Implemented as an inline macro.
See also
SIM_EnableFlashDoze
#define SIM_EnableFlash ( )

This macro enables flash accesses.

Note
Implemented as an inline macro.
See also
SIM_DisableFlash
#define SIM_DisableFlash ( )

This macro disables flash accesses and places flash memory in low power state.

Note
Implemented as an inline macro.
Warning
This macro should not be called during VLP modes. Relocate the interrupt vectors out of flash memory before calling this macro.
See also
SIM_EnableFlash
#define SIM_SelRtcClk (   src)

This macro selects between 32KIRC and OSC32K clock sources for RTC operation.

Parameters
srcSelect one of the SIM RTC Clock Sources.
Note
Implemented as an inline macro.
Warning
This bit is reset only on POR/LVD.
#define SIM_SelAfeClkPadDir (   dir)

This macro selects direction of the AFE_CLK pin.

Parameters
dirTRUE AFE CLK PAD is output
FALSE AFE CLK PAD is input (default).
Note
Implemented as an inline macro.
#define SIM_SelAfeClkPadDir (   dir)

This macro selects direction of the AFE_CLK pin.

Parameters
dirTRUE AFE CLK PAD is output
FALSE AFE CLK PAD is input (default).
Note
Implemented as an inline macro.
#define SIM_SelXbarAfeModOut (   src)

This macro selects field selects modulator data output of the respective AFE channel to drive XBAR_IN[3].

Parameters
srcSelect one of the SIM AFE Modulator Outputs.
Note
Implemented as an inline macro.
#define SIM_SelXbarPitOut (   src)

This macro selects PIT Timer and Timer channel to drive XBAR_IN[16].

Parameters
srcSelect one of the SIM PIT Outputs.
Note
Implemented as an inline macro.
#define SIM_SelTmrPcs (   ch,
  src 
)

This macro selects quad timer channel primary count source.

Parameters
chCH0,CH1,CH2,CH3.
srcSelect one of the SIM TMR Primary Count Sources.
Note
Implemented as an inline macro.
See also
SIM_SelTmrScs, TMR_Init, XBAR_Path
#define SIM_SelTmrScs (   ch,
  src 
)

This macro selects quad timer channel secondary count source.

Parameters
chCH0,CH1,CH2,CH3.
srcRefer to the following table:
Channelsrc=TRUE src=FALSE (default)Secondary count source
CH0 XBAR_OUT[5] PTF1 or PTD5 SEC_CNTR0_INP
CH1 XBAR_OUT[6] PTG0 or PTC6 SEC_CNTR1_INP
CH2 XBAR_OUT[7] PTF7 or PTF0 SEC_CNTR2_INP
CH3 XBAR_OUT[8] PTE5 or PTD1 SEC_CNTR3_INP
Note
Implemented as an inline macro.
See also
SIM_SelTmrPcs, TMR_Init, XBAR_Path
#define SIM_SelTmrCh0Clk (   src)

This macro selects either Bus Clock or PLL AFE clock as the source for Timer CH0. The Timer CH0 output can be used as the AFE clock source.

Parameters
srcTRUE Selects the PLL_AFE clock as the source for Timer CH0
FALSE Selects Bus Clock as source for the Timer CH0 (default).
Note
Implemented as an inline macro.
See also
SIM_SelAfePllClk
#define SIM_SelUartIR (   ch,
  src 
)

This macro selects uart source for driving IR communication.

Parameters
chUART0,UART1,UART2,UART3.
srcRefer to the following table:
Channelsrc=FALSE (default) src=TRUE
UART0 RX=PTD0, PTF3 or PTK3RX=>XBAR_OUT[13],TX modulated by XBAR_OUT[14]=>XBAR_INP[14]
UART1 RX=PTD2, PTI0 or PTK5RX=>XBAR_OUT[13],TX modulated by XBAR_OUT[14]=>XBAR_INP[14]
UART2 RX=PTI6 or PTE6 RX=>XBAR_OUT[13],TX modulated by XBAR_OUT[14]=>XBAR_INP[14]
UART3 RX=PTD7 or PTC3 RX=>XBAR_OUT[13],TX modulated by XBAR_INP[14]=>XBAR_INP[14]
Note
Implemented as an inline macro.
#define SIM_SelModTypeIR (   x)

This macro selects modulation type for IR communication.

Parameters
xTRUE TypeB (ANDed) Modulation selected for IRDA
FALSE TypeA (ORed) Modulation selected for IRDA (default).
Note
Implemented as an inline macro.
#define SIM_SelAfePllClk (   src)

This macro selects between PLL, FLL and OSC clocks as the source for the PLL clock branch for AFE Clock.

Parameters
srcSelect one of the SIM AFE Clock Sources.
Note
Implemented as an inline macro.
See also
SIM_SelTmrCh0Clk
#define SIM_SelEwmInput (   src)

This macro selects external watchdog monitor input source.

Parameters
srcSelect one of the SIM EWM Input Sources.
Note
Implemented as an inline macro.
#define SIM_Init (   cfg)

This macro initializes System Integration Module (SIM).

Parameters
cfgSelect one of the SIM Configuration Structures.
Note
Implemented as an inline macro.