MKM34Z256VLx7 Bare Metal Software Drivers  R4.1.6
Reference Manual
EWM Configuration Structures

Overview

This section describes default configuration structures for EWM module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).

Macros

#define EWM_MODULE_IN_EN_CONFIG(clksrc, presc, per_lo, per_hi)
 Selects EWM no inversed input. More...
 
#define EWM_MODULE_IN_EN_INVERT_CONFIG(clksrc, presc, per_lo, per_hi)
 Selects EWM inverted input. More...
 
#define EWM_MODULE_IN_DI_CONFIG(clksrc, presc, per_lo, per_hi)
 Selects EWM input disabled. More...
 

Macro Definition Documentation

#define EWM_MODULE_IN_EN_CONFIG (   clksrc,
  presc,
  per_lo,
  per_hi 
)
Value:
(tEWM){ \
/* CTRL */ SET(EWM_CTRL_INTEN_MASK)|SET(EWM_CTRL_INEN_MASK)| \
/* ............ */ CLR(EWM_CTRL_ASSIN_MASK)|SET(EWM_CTRL_EWMEN_MASK), \
/* CMPL */ per_lo, \
/* CMPH */ per_hi, \
/* CLKCTRL */ clksrc, \
/* CLKPRESCALER */ presc, \
}

The EWM input is enabled, no input assert inverted (default assert state is 0).

Parameters
clksrcSelect one of the EWM Clock Sources.
prescClock source prescaler (0-256), prescaled clock frequency is equal to frequency of the clksrc/(1+presc). The divided clock must be no more than half of the bus clock frequency.
per_hiUpper watchdog window timeout in number of clock cycles.
per_loLower watchdog window timeout in number of clock cycles.
#define EWM_MODULE_IN_EN_INVERT_CONFIG (   clksrc,
  presc,
  per_lo,
  per_hi 
)
Value:
(tEWM){ \
/* CTRL */ SET(EWM_CTRL_INTEN_MASK)|SET(EWM_CTRL_INEN_MASK)| \
/* ............ */ SET(EWM_CTRL_ASSIN_MASK)|SET(EWM_CTRL_EWMEN_MASK), \
/* CMPL */ per_lo, \
/* CMPH */ per_hi, \
/* CLKCTRL */ clksrc, \
/* CLKPRESCALER */ presc, \
}

The EWM input is enabled, input assert inversion (default assert state is 1).

Parameters
clksrcSelect one of the EWM Clock Sources.
prescClock source prescaler (0-256), prescaled clock frequency is equal to frequency of the clksrc/(1+presc). The divided clock must be no more than half of the bus clock frequency.
per_hiUpper watchdog window timeout in number of clock cycles.
per_loLower watchdog window timeout in number of clock cycles.
#define EWM_MODULE_IN_DI_CONFIG (   clksrc,
  presc,
  per_lo,
  per_hi 
)
Value:
(tEWM){ \
/* CTRL */ SET(EWM_CTRL_INTEN_MASK)|CLR(EWM_CTRL_INEN_MASK)| \
/* ............ */ CLR(EWM_CTRL_ASSIN_MASK)|SET(EWM_CTRL_EWMEN_MASK), \
/* CMPL */ per_lo, \
/* CMPH */ per_hi, \
/* CLKCTRL */ clksrc, \
/* CLKPRESCALER */ presc, \
}

The EWM input is disabled.

Parameters
clksrcSelect one of the EWM Clock Sources.
prescClock source prescaler (0-256), prescaled clock frequency is equal to frequency of the clksrc/(1+presc). The divided clock must be no more than half of the bus clock frequency.
per_hiUpper watchdog window timeout in number of clock cycles.
per_loLower watchdog window timeout in number of clock cycles.