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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
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List of request sources used by DMA Configuration Structures configuration structures. If you assign a DMA channel with either DMA_REQ_DISABLED source or any of the reserved sources then it will disable that DMA channel.
Macros | |
#define | DMA_REQ_DISABLED |
Channel disabled (default) | |
#define | DMA_REQ_UART0_RX |
UART0 Receive. | |
#define | DMA_REQ_UART0_TX |
UART0 Transmit. | |
#define | DMA_REQ_UART1_RX |
UART1 Receive. | |
#define | DMA_REQ_UART1_TX |
UART1 Transmit. | |
#define | DMA_REQ_UART2_RX |
UART2 Receive. | |
#define | DMA_REQ_UART2_TX |
UART2 Transmit. | |
#define | DMA_REQ_UART3_RX |
UART3 Receive. | |
#define | DMA_REQ_UART3_TX |
UART3 Transmit. | |
#define | DMA_REQ_SPI0_RX |
SPI0 Receive. | |
#define | DMA_REQ_SPI0_TX |
SPI0 Transmit. | |
#define | DMA_REQ_SPI1_RX |
SPI1 Receive. | |
#define | DMA_REQ_SPI1_TX |
SPI1 Transmit. | |
#define | DMA_REQ_I2C0 |
I2C0. | |
#define | DMA_REQ_I2C1 |
I2C1. | |
#define | DMA_REQ_TMR_CH0 |
Quad Timer CH0 OFLAG. | |
#define | DMA_REQ_TMR_CH1 |
Quad Timer CH1 OFLAG. | |
#define | DMA_REQ_TMR_CH2 |
Quad Timer CH2 OFLAG. | |
#define | DMA_REQ_TMR_CH3 |
Quad Timer CH3 OLAG. | |
#define | DMA_REQ_XBAR0 |
XBAR DMA request 0. | |
#define | DMA_REQ_XBAR1 |
XBAR DMA request 1. | |
#define | DMA_REQ_XBAR2 |
XBAR DMA request 2. | |
#define | DMA_REQ_XBAR3 |
XBAR DMA request 3. | |
#define | DMA_REQ_AFE_CH0 |
AFE CH0. | |
#define | DMA_REQ_AFE_CH1 |
AFE CH1. | |
#define | DMA_REQ_AFE_CH2 |
AFE CH2. | |
#define | DMA_REQ_AFE_CH3 |
AFE CH3. | |
#define | DMA_REQ_PORTJ |
Port J. | |
#define | DMA_REQ_PORTK |
Port K. | |
#define | DMA_REQ_PORTL |
Port L. | |
#define | DMA_REQ_PORTM |
Port M. | |
#define | DMA_REQ_ADC |
SAR ADC. | |
#define | DMA_REQ_CMP0 |
CMP0. | |
#define | DMA_REQ_CMP1 |
CMP1. | |
#define | DMA_REQ_CMP2 |
CMP2. | |
#define | DMA_REQ_MMAU |
MMAU. | |
#define | DMA_REQ_PDB |
PDB. | |
#define | DMA_REQ_PORTA |
Port A. | |
#define | DMA_REQ_PORTB |
Port B. | |
#define | DMA_REQ_PORTC |
Port C. | |
#define | DMA_REQ_PORTD |
Port D. | |
#define | DMA_REQ_PORTE |
Port E. | |
#define | DMA_REQ_PORTF |
Port F. | |
#define | DMA_REQ_PORTG |
Port G. | |
#define | DMA_REQ_PORTH |
Port H. | |
#define | DMA_REQ_PORTI |
Port I. | |
#define | DMA_REQ_LPUART_RX |
LPUART Receive. | |
#define | DMA_REQ_LPUART_TX |
LPUART Transmit. | |
#define | DMA_REQ_ENABLED |
Always enabled. | |