MKMxxZxxACxx5 Bare Metal Software Drivers  R4.1.6
Reference Manual
VREF API Specification

Overview

This section describes functions and macros of the driver's API.

Macros

#define VREF_Disable()
 Disable voltage reference. More...
 
#define VREF_CtrlICOMPEN(x)
 Enable/disable second order curvature compensation. More...
 
#define VREFH_Trim(trim)
 Higher reference voltage Trim value change. More...
 
#define VREFL_Trim(trim)
 Lower reference voltage Trim value change. More...
 
#define VREF_Init(cfg, cfg_s)
 Voltage reference initialization. More...
 

Macro Definition Documentation

#define VREF_Disable ( )

This macro disables voltage reference.

Note
Implemented as an inline macro.
Warning
Call this function prior entering low power mode.
See also
VREF_Init
#define VREF_CtrlICOMPEN (   x)

This macro enables/disables second order curvature compensation.

Parameters
xTRUE (enabled - default for MKMxxZxxACxx5 devices)
FALSE (disabled - must be used for MKMxxZxxCxx5 devices).
Note
The second order curvature compensation must be enabled to achieve the best temperature drift across full temperature range. This compensation is enabled by default on new MKMxxZxxACxx5 devices. Older MKMxxZxxCxx5 devices don't support this compensation.
See also
VREF_Init
#define VREFH_Trim (   trim)

Change higher reference voltage without change other parameters. VREFH reference output can be trimmed with a resolution of 0.5 mV.

Parameters
trim6-bit trim value.
Note
Implemented as an inline macro.
#define VREFL_Trim (   trim)

Change lower reference voltage without change other parameters. VREFL reference output can be trimmed with a resolution of 10 mV.

Parameters
trim3-bit trim value.
Note
Implemented as an inline macro.
#define VREF_Init (   cfg,
  cfg_s 
)

This function initializes Voltage reference.

Parameters
cfgSelect one of the VREF Configuration Structures.
cfg_sSelect one of the VREF Switch Control Configuration Structures.
Note
Implemented as a function call.
Warning
Call this function after SIM_Init function call. Buffer Enable is controlled via SIM module SIM_MISC_CTL[VREFBUFPD], S1 is controlled via SIM module SIM_MISC_CTL[VREFBUFOUTEN], S2 is controlled via SIM module SIM_MISC_CTL[VREFBUFINSEL] and S3 is controlled via VREF module VREF_VREFL_TRM[VREFL_SEL].
See also
VREF_Disable