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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
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In this example, the Phase Delay Block (PDB) triggers the AFE. The PDB counter is in one shot mode and is triggered by the CMP2 output (rising edge in compared voltages in this case). After the CMP2 trigger occurs the AFE channels are triggered with different delays.
IAR EWARM 7.40.7 | KEIL uVision 5.15 | CrossWorks 3.6 | ATOLLIC TrueStudio 5.3.0 | Kinetis Design Studio 3.0.0 |
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