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E:/PROJECTS/IOP/ADC Average/Src/ADC_Filter/ADC_Filter_Drv/src/Adc.h File Reference

Analog to Digital conversion definitions and general configuration parameters. More...

#include "Adc_Cfg.h"
#include "edma_init.h"
#include "Derivative.h"

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Go to the source code of this file.

Defines

#define RFIFO0_POP   0xFFF80032
#define CFIFO0_PUSH   0xFFF80010
#define DISABLE_Q   (uint8_t)0x0
#define SW_TRIG_SS   (uint8_t)0x1
#define LOW_GATED_EXT_SS   (uint8_t)0x2
#define HIGH_GATED_EXT_SS   (uint8_t)0x3
#define FALLING_EXT_SS   (uint8_t)0x4
#define RISING_EXT_SS   (uint8_t)0x5
#define FALL_OR_RISE_EXT_SS   (uint8_t)0x6
#define SW_TRIG_CS   (uint8_t)0x9
#define LOW_GATED_EXT_CS   (uint8_t)0xA
#define HIGH_GATED_EXT_CS   (uint8_t)0xB
#define FALLING_EXT_CS   (uint8_t)0xC
#define RISING_EXT_CS   (uint8_t)0xD
#define FALL_OR_RISE_EXT_CS   (uint8_t)0xE
#define ADC_CALIBRATION_MODE   (ADC_CAL_DISABLE)
#define ADC_WRITE_CONFIG_CMD(u32CtrlCmd, cFifoBuffer)   (EQADC.CFPR[cFifoBuffer].R = (uint32_t)u32CtrlCmd)
#define ADC_WRITE_CONTROL_CMD(Cmd, cFifoBuffer)   (EQADC.CFCR[cFifoBuffer].R = (uint16_t)Cmd)
#define ADC_END_OF_QUEUE_FLAG(u8AdcFifoBuffer)   (EQADC.FISR[u8AdcFifoBuffer].B.EOQF)
#define ADC_RFIFO_FLAG(u8AdcFifoBuffer)   (EQADC.FISR[u8AdcFifoBuffer].B.RFDF)
#define ADC_READ_RESULT(u8AdcFifoBuffer)   (EQADC.RFPR[u8AdcFifoBuffer].R)
#define ADC_SET_SSE_BIT(u8Fifo)   (EQADC.CFCR[u8Fifo].B.SSE = (uint8_t)0x1)
#define ADC_INVALIDATE_CFIFO(u8FifoNum)   (EQADC.CFCR[u8FifoNum].R = 0x0200)
#define ADC_DMA_CR(u8Buffer, u16Value)   (EQADC.IDCR[u8Buffer].R = (uint16_t)u16Value)
#define ADC_CONVERT_AND_READ(u8AdcChannel, u16CollectAdcResult)
#define ADC_CONVERT_AND_READ_EDMA_FLG()

Functions

void vfnAdc_Init (void)
 Initialize Adc0 module with Predefined parameters established at
Adc_Cfg.h file.
uint16_t u16Read_Adc_Result (uint8_t u8AdcFifoBuffer)
 Read an ADC result from a desired ADC channel.
void vfnInitAdc_Calibration (uint32_t u32dac)
 calculates ADC calibration values and write those values into
GCC & OCC registers
void vfnWait_Till_Valid_Adc_Result (uint8_t u8AdcFifoBuffer)
 Wait until an ADC channel has a valid result. This functions polls the
eDMA x Channel to validate a ADC result.
void eqadc_init_fnc (void)
 Initialize Adc Command queues and enables eDMA functionality.
void eqadc_cfifo0_sw_trigger_fnc (void)
 Start ADC conversions by triggering the eDMA module.


Detailed Description

Analog to Digital conversion definitions and general configuration parameters.

Copyright (c) 2008 Freescale Semiconductor Freescale Confidential Proprietary

Author:
Freescale Semiconductor

r01160

Guadalajara Applications Laboratory RTAC Americas

Version:
0.1
Date:
6/27/2008 9:56:17 AM
Warning:
ADC_CLK_PRESCALER must be set using the system clock reference. Otherwise,
ADC0 Clock might run out over normal operation. ADC clock must not run over
12 MHz.
History:

Define Documentation

#define ADC_CALIBRATION_MODE   (ADC_CAL_DISABLE)

Enables or Disables ADC Calibration feature

#define ADC_CONVERT_AND_READ ( u8AdcChannel,
u16CollectAdcResult   ) 

Value:

vfnStart_Conversion_fnc(u8AdcChannel, ADC_CALIBRATION_MODE); \
                                                                    u16CollectAdcResult = (uint16_t)((uint16_t)u16Read_Adc_Result(ADC_FIFO_BUFFER) >> (uint16_t)2)

 
#define ADC_CONVERT_AND_READ_EDMA_FLG (  ) 

Value:

This macro triggers the eDMA to start conversions and wait until eDMA reads the configured ADC channels

#define ADC_DMA_CR ( u8Buffer,
u16Value   )     (EQADC.IDCR[u8Buffer].R = (uint16_t)u16Value)

Writes to ADC Interrupt and DMA control register

#define ADC_END_OF_QUEUE_FLAG ( u8AdcFifoBuffer   )     (EQADC.FISR[u8AdcFifoBuffer].B.EOQF)

Adc Queue Flag

#define ADC_INVALIDATE_CFIFO ( u8FifoNum   )     (EQADC.CFCR[u8FifoNum].R = 0x0200)

Invalidates CFIFO buffer

#define ADC_READ_RESULT ( u8AdcFifoBuffer   )     (EQADC.RFPR[u8AdcFifoBuffer].R)

Adc FIFO Pop Data. Retrieves data from specific FIFO buffer (0-5)

#define ADC_RFIFO_FLAG ( u8AdcFifoBuffer   )     (EQADC.FISR[u8AdcFifoBuffer].B.RFDF)

Adc RFIFO Drain Flag register

#define ADC_SET_SSE_BIT ( u8Fifo   )     (EQADC.CFCR[u8Fifo].B.SSE = (uint8_t)0x1)

Set SSE bit on CFCRx register

#define ADC_WRITE_CONFIG_CMD ( u32CtrlCmd,
cFifoBuffer   )     (EQADC.CFPR[cFifoBuffer].R = (uint32_t)u32CtrlCmd)

Writes configuration command to on-chip ADC

#define ADC_WRITE_CONTROL_CMD ( Cmd,
cFifoBuffer   )     (EQADC.CFCR[cFifoBuffer].R = (uint16_t)Cmd)

Writes control command to on-chip ADC

#define CFIFO0_PUSH   0xFFF80010

ADC cFIFO register address

#define DISABLE_Q   (uint8_t)0x0

ADC Trigger Modes

#define FALL_OR_RISE_EXT_CS   (uint8_t)0xE

#define FALL_OR_RISE_EXT_SS   (uint8_t)0x6

#define FALLING_EXT_CS   (uint8_t)0xC

#define FALLING_EXT_SS   (uint8_t)0x4

#define HIGH_GATED_EXT_CS   (uint8_t)0xB

#define HIGH_GATED_EXT_SS   (uint8_t)0x3

#define LOW_GATED_EXT_CS   (uint8_t)0xA

#define LOW_GATED_EXT_SS   (uint8_t)0x2

#define RFIFO0_POP   0xFFF80032

ADC receive FIFO register address

#define RISING_EXT_CS   (uint8_t)0xD

#define RISING_EXT_SS   (uint8_t)0x5

#define SW_TRIG_CS   (uint8_t)0x9

#define SW_TRIG_SS   (uint8_t)0x1


Function Documentation

void eqadc_cfifo0_sw_trigger_fnc ( void   ) 

Start ADC conversions by triggering the eDMA module.

Author:
R01160
Parameters:
none 
Returns:
none

void eqadc_init_fnc ( void   ) 

Initialize Adc Command queues and enables eDMA functionality.

Author:
R01160
Parameters:
none 
Returns:
none
Warning:
This function shall be invoked once at initialization.

uint16_t u16Read_Adc_Result ( uint8_t  u8AdcFifoBuffer  ) 

Read an ADC result from a desired ADC channel.

Author:
R01160
Parameters:
none 
Returns:
ADC result returned in 16-bit

void vfnAdc_Init ( void   ) 

Initialize Adc0 module with Predefined parameters established at
Adc_Cfg.h file.

Author:
R01160
Parameters:
none 
Returns:
none
Warning:
This function shall be invoked once at initialization.

void vfnInitAdc_Calibration ( uint32_t  u32dac  ) 

calculates ADC calibration values and write those values into
GCC & OCC registers

Author:
R01160
Parameters:
Buffer number (FIFO)
Returns:
none
Warning:
This function shall be invoked once at initialization.

void vfnWait_Till_Valid_Adc_Result ( uint8_t  u8AdcFifoBuffer  ) 

Wait until an ADC channel has a valid result. This functions polls the
eDMA x Channel to validate a ADC result.

Author:
R01160
Parameters:
none 
Returns:
none